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Wafer Space

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3.9

based on 41 Reviews

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Wafer Space Design Engineer Interview Questions and Answers

Updated 2 Jun 2024

Wafer Space Design Engineer Interview Experiences

1 interview found

Design Engineer Interview Questions & Answers

user image Anonymous

posted on 2 Jun 2024

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Campus Placement and was interviewed before Jun 2023. There were 2 interview rounds.

Round 1 - Aptitude Test 

(2 Questions)

  • Q1. Basics of cmos, working of cmos etc
    • Add your answer
  • Q2. Aptitude questions, logic design questions
    • Add your answer
Round 2 - One-on-one 

(2 Questions)

  • Q1. Based on resume, projects done in college
    • Add your answer
  • Q2. CMOS basics, synchronous clocks etc etc
    • Add your answer

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Interview Tips & Stories
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Oxane Partners
Disappointing Interview Experience with D.E. Shaw
I recently interviewed with D.E. Shaw, and it turned out to be one of the most draining experiences I’ve had. The interviewer’s approach felt unnecessarily harsh and dismissive, which made the entire process uncomfortable. At multiple points, the interviewer asked me to drop off the call, even when I tried asking basic questions about the designation, job description, and other details. After the interview, I found myself sitting there for a few minutes, trying to process what just happened. It left me questioning the overall tone and professionalism of the interview. Definitely not the experience I was expecting from such a well-known firm.
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Interview questions from similar companies

Design Engineer Interview Questions & Answers

Ignitarium Technology Solutions user image Anonymous

posted on 13 Nov 2024

Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. CDC technique , and why need of CDC
  • Ans. 

    CDC stands for Clock Domain Crossing technique used in digital design to ensure proper data transfer between different clock domains.

    • CDC technique involves synchronizing data signals when crossing between different clock domains to prevent metastability issues.

    • It is necessary because different clock domains operate at different frequencies and can lead to data corruption if not properly synchronized.

    • Common CDC techniqu...

    • Answered by AI
    Add your answer
  • Q2. How to transfer multiple bits in CDC
  • Ans. 

    Transfer multiple bits in CDC involves using a parallel data transfer method.

    • Use parallel data transfer method to transfer multiple bits simultaneously

    • Implement a shift register to store and shift out multiple bits

    • Utilize multiplexers to select and transfer specific bits

    • Consider using a bus architecture for efficient data transfer

    • Answered by AI
    Add your answer

Skills evaluated in this interview

Design Engineer Interview Questions & Answers

ON Semiconductor user image Anonymous

posted on 11 Jan 2025

Interview experience
1
Bad
Difficulty level
Hard
Process Duration
More than 8 weeks
Result
Selected Selected

I applied via Indeed and was interviewed before Jan 2024. There were 4 interview rounds.

Round 1 - Technical 

(2 Questions)

  • Q1. Questions based on analog circuit design, verilog modules, register transistor logics, CMOS etc
    • Add your answer
  • Q2. Common questions related to analog circuits, specifically focusing on MOSFETs.
    • Add your answer
Round 2 - Technical 

(1 Question)

  • Q1. Project related questions mostly based on practical implementations and issues debugged.
    • Add your answer
Round 3 - Technical 

(1 Question)

  • Q1. Project related questions and managerial questions.
    • Add your answer
Round 4 - HR 

(1 Question)

  • Q1. Typical HR questions
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare for best and expect the worst in terms of interview experience. HR management is worst and they'll keep finding replacements of yours even after selecting. So you should also have plan B incase your candidature gets rejected. I declined the offer and joined another company.

Design Engineer Interview Questions & Answers

Ignitarium Technology Solutions user image Anonymous

posted on 9 Aug 2024

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Approached by Company and was interviewed before Aug 2023. There were 2 interview rounds.

Round 1 - Coding Test 

Basic coding questions and questions based on resume

Round 2 - HR 

(3 Questions)

  • Q1. About the latest qualification.
    • Add your answer
  • Q2. About previous employment
    • Add your answer
  • Q3. About my motivation to join
    • Add your answer

Design Engineer Interview Questions & Answers

Mobiveil Technologies India user image Anonymous

posted on 16 Sep 2021

I applied via Naukri.com and was interviewed in Mar 2021. There was 1 interview round.

Interview Questionnaire 

1 Question

  • Q1. About axi protocol, fsm based questions, digital design based questions and project related
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - prepare well for the basics required for the position you are applying. be through with resume.

Design Engineer Interview Questions & Answers

Ignitarium Technology Solutions user image Anonymous

posted on 13 Nov 2024

Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. CDC technique , and why need of CDC
  • Ans. 

    CDC stands for Clock Domain Crossing technique used in digital design to ensure proper data transfer between different clock domains.

    • CDC technique involves synchronizing data signals when crossing between different clock domains to prevent metastability issues.

    • It is necessary because different clock domains operate at different frequencies and can lead to data corruption if not properly synchronized.

    • Common CDC techniqu...

    • Answered by AI
    Add your answer
  • Q2. How to transfer multiple bits in CDC
  • Ans. 

    Transfer multiple bits in CDC involves using a parallel data transfer method.

    • Use parallel data transfer method to transfer multiple bits simultaneously

    • Implement a shift register to store and shift out multiple bits

    • Utilize multiplexers to select and transfer specific bits

    • Consider using a bus architecture for efficient data transfer

    • Answered by AI
    Add your answer

Skills evaluated in this interview

Design Engineer Interview Questions & Answers

ON Semiconductor user image Anonymous

posted on 11 Jan 2025

Interview experience
1
Bad
Difficulty level
Hard
Process Duration
More than 8 weeks
Result
Selected Selected

I applied via Indeed and was interviewed before Jan 2024. There were 4 interview rounds.

Round 1 - Technical 

(2 Questions)

  • Q1. Questions based on analog circuit design, verilog modules, register transistor logics, CMOS etc
    • Add your answer
  • Q2. Common questions related to analog circuits, specifically focusing on MOSFETs.
    • Add your answer
Round 2 - Technical 

(1 Question)

  • Q1. Project related questions mostly based on practical implementations and issues debugged.
    • Add your answer
Round 3 - Technical 

(1 Question)

  • Q1. Project related questions and managerial questions.
    • Add your answer
Round 4 - HR 

(1 Question)

  • Q1. Typical HR questions
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare for best and expect the worst in terms of interview experience. HR management is worst and they'll keep finding replacements of yours even after selecting. So you should also have plan B incase your candidature gets rejected. I declined the offer and joined another company.

Senior Design Engineer Interview Questions & Answers

MediaTek India Technology user image Anonymous

posted on 16 May 2023

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Referral and was interviewed in Nov 2022. There were 2 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(3 Questions)

  • Q1. About LNA, VCO and LDO projects
    • Add your answer
  • Q2. Basics of Fourier transform
    • Add your answer
  • Q3. Basic analog circuit questions
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - Do prepare all the projects in the CV

Design Engineer Interview Questions & Answers

Ignitarium Technology Solutions user image Anonymous

posted on 9 Aug 2024

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Approached by Company and was interviewed before Aug 2023. There were 2 interview rounds.

Round 1 - Coding Test 

Basic coding questions and questions based on resume

Round 2 - HR 

(3 Questions)

  • Q1. About the latest qualification.
    • Add your answer
  • Q2. About previous employment
    • Add your answer
  • Q3. About my motivation to join
    • Add your answer

Design Engineer Interview Questions & Answers

Mobiveil Technologies India user image Anonymous

posted on 16 Sep 2021

I applied via Naukri.com and was interviewed in Mar 2021. There was 1 interview round.

Interview Questionnaire 

1 Question

  • Q1. About axi protocol, fsm based questions, digital design based questions and project related
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - prepare well for the basics required for the position you are applying. be through with resume.
More about working at Wafer Space

Wafer Space Interview FAQs

How many rounds are there in Wafer Space Design Engineer interview?
Wafer Space interview process usually has 2 rounds. The most common rounds in the Wafer Space interview process are Aptitude Test and One-on-one Round.
How to prepare for Wafer Space Design Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Wafer Space. The most common topics and skills that interviewers at Wafer Space expect are Synthesis.
What are the top questions asked in Wafer Space Design Engineer interview?

Some of the top questions asked at the Wafer Space Design Engineer interview -

  1. Aptitude questions, logic design questi...read more
  2. CMOS basics, synchronous clocks etc ...read more
  3. Basics of cmos, working of cmos ...read more

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Wafer Space Design Engineer Salary
based on 30 salaries
₹4.7 L/yr - ₹20 L/yr
130% more than the average Design Engineer Salary in India
View more details

Wafer Space Design Engineer Reviews and Ratings

based on 3 reviews

3.0/5

Rating in categories

2.1

Skill development

3.1

Work-Life balance

3.0

Salary & Benefits

2.0

Job Security

2.1

Company culture

2.9

Promotions/Appraisal

2.1

Work Satisfaction

Explore 3 Reviews and Ratings
Wafer Space Salaries in India
Senior Software Engineer
52 salaries
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₹7.2 L/yr - ₹19 L/yr

Design Engineer
30 salaries
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₹4.7 L/yr - ₹20 L/yr

Design Engineer II
18 salaries
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₹7 L/yr - ₹23.5 L/yr

Software Engineer
17 salaries
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₹4.2 L/yr - ₹11.5 L/yr

Technical Lead
16 salaries
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₹13 L/yr - ₹38 L/yr

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