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Mobiveil Technologies India Design Engineer Interview Questions and Answers

Updated 16 Sep 2021

Mobiveil Technologies India Design Engineer Interview Experiences

1 interview found

I applied via Naukri.com and was interviewed in Mar 2021. There was 1 interview round.

Interview Questionnaire 

1 Question

  • Q1. About axi protocol, fsm based questions, digital design based questions and project related

Interview Preparation Tips

Interview preparation tips for other job seekers - prepare well for the basics required for the position you are applying. be through with resume.

Interview questions from similar companies

Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. CDC technique , and why need of CDC
  • Ans. 

    CDC stands for Clock Domain Crossing technique used in digital design to ensure proper data transfer between different clock domains.

    • CDC technique involves synchronizing data signals when crossing between different clock domains to prevent metastability issues.

    • It is necessary because different clock domains operate at different frequencies and can lead to data corruption if not properly synchronized.

    • Common CDC techniqu...

  • Answered by AI
  • Q2. How to transfer multiple bits in CDC
  • Ans. 

    Transfer multiple bits in CDC involves using a parallel data transfer method.

    • Use parallel data transfer method to transfer multiple bits simultaneously

    • Implement a shift register to store and shift out multiple bits

    • Utilize multiplexers to select and transfer specific bits

    • Consider using a bus architecture for efficient data transfer

  • Answered by AI

Skills evaluated in this interview

Interview experience
1
Bad
Difficulty level
Hard
Process Duration
More than 8 weeks
Result
Selected Selected

I applied via Indeed and was interviewed before Jan 2024. There were 4 interview rounds.

Round 1 - Technical 

(2 Questions)

  • Q1. Questions based on analog circuit design, verilog modules, register transistor logics, CMOS etc
  • Q2. Common questions related to analog circuits, specifically focusing on MOSFETs.
Round 2 - Technical 

(1 Question)

  • Q1. Project related questions mostly based on practical implementations and issues debugged.
Round 3 - Technical 

(1 Question)

  • Q1. Project related questions and managerial questions.
Round 4 - HR 

(1 Question)

  • Q1. Typical HR questions

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare for best and expect the worst in terms of interview experience. HR management is worst and they'll keep finding replacements of yours even after selecting. So you should also have plan B incase your candidature gets rejected. I declined the offer and joined another company.
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Campus Placement and was interviewed before Jun 2023. There were 2 interview rounds.

Round 1 - Aptitude Test 

(2 Questions)

  • Q1. Basics of cmos, working of cmos etc
  • Q2. Aptitude questions, logic design questions
Round 2 - One-on-one 

(2 Questions)

  • Q1. Based on resume, projects done in college
  • Q2. CMOS basics, synchronous clocks etc etc
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Referral and was interviewed in Nov 2022. There were 2 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(3 Questions)

  • Q1. About LNA, VCO and LDO projects
  • Q2. Basics of Fourier transform
  • Q3. Basic analog circuit questions

Interview Preparation Tips

Interview preparation tips for other job seekers - Do prepare all the projects in the CV
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Approached by Company and was interviewed before Aug 2023. There were 2 interview rounds.

Round 1 - Coding Test 

Basic coding questions and questions based on resume

Round 2 - HR 

(3 Questions)

  • Q1. About the latest qualification.
  • Q2. About previous employment
  • Q3. About my motivation to join
Interview experience
1
Bad
Difficulty level
Hard
Process Duration
More than 8 weeks
Result
Selected Selected

I applied via Indeed and was interviewed before Jan 2024. There were 4 interview rounds.

Round 1 - Technical 

(2 Questions)

  • Q1. Questions based on analog circuit design, verilog modules, register transistor logics, CMOS etc
  • Q2. Common questions related to analog circuits, specifically focusing on MOSFETs.
Round 2 - Technical 

(1 Question)

  • Q1. Project related questions mostly based on practical implementations and issues debugged.
Round 3 - Technical 

(1 Question)

  • Q1. Project related questions and managerial questions.
Round 4 - HR 

(1 Question)

  • Q1. Typical HR questions

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare for best and expect the worst in terms of interview experience. HR management is worst and they'll keep finding replacements of yours even after selecting. So you should also have plan B incase your candidature gets rejected. I declined the offer and joined another company.
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Campus Placement and was interviewed before Jun 2023. There were 2 interview rounds.

Round 1 - Aptitude Test 

(2 Questions)

  • Q1. Basics of cmos, working of cmos etc
  • Q2. Aptitude questions, logic design questions
Round 2 - One-on-one 

(2 Questions)

  • Q1. Based on resume, projects done in college
  • Q2. CMOS basics, synchronous clocks etc etc
Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. CDC technique , and why need of CDC
  • Ans. 

    CDC stands for Clock Domain Crossing technique used in digital design to ensure proper data transfer between different clock domains.

    • CDC technique involves synchronizing data signals when crossing between different clock domains to prevent metastability issues.

    • It is necessary because different clock domains operate at different frequencies and can lead to data corruption if not properly synchronized.

    • Common CDC techniqu...

  • Answered by AI
  • Q2. How to transfer multiple bits in CDC
  • Ans. 

    Transfer multiple bits in CDC involves using a parallel data transfer method.

    • Use parallel data transfer method to transfer multiple bits simultaneously

    • Implement a shift register to store and shift out multiple bits

    • Utilize multiplexers to select and transfer specific bits

    • Consider using a bus architecture for efficient data transfer

  • Answered by AI

Skills evaluated in this interview

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I was interviewed before Feb 2023.

Round 1 - Technical 

(1 Question)

  • Q1. PnR flow,Synthesis,STA

Mobiveil Technologies India Interview FAQs

How to prepare for Mobiveil Technologies India Design Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Mobiveil Technologies India. The most common topics and skills that interviewers at Mobiveil Technologies India expect are Protocol Designing, RTL and SPI.

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Mobiveil Technologies India Design Engineer Salary
based on 5 salaries
₹3 L/yr - ₹9.2 L/yr
18% more than the average Design Engineer Salary in India
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