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CDC stands for Clock Domain Crossing technique used in digital design to ensure proper data transfer between different clock domains.
CDC technique involves synchronizing data signals when crossing between different clock domains to prevent metastability issues.
It is necessary because different clock domains operate at different frequencies and can lead to data corruption if not properly synchronized.
Common CDC techniqu...
Transfer multiple bits in CDC involves using a parallel data transfer method.
Use parallel data transfer method to transfer multiple bits simultaneously
Implement a shift register to store and shift out multiple bits
Utilize multiplexers to select and transfer specific bits
Consider using a bus architecture for efficient data transfer
I applied via Approached by Company and was interviewed before Aug 2023. There were 2 interview rounds.
Basic coding questions and questions based on resume
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posted on 21 Dec 2024
I applied via LinkedIn and was interviewed in Nov 2024. There was 1 interview round.
Grid check is a process to verify the accuracy of a grid system in a design.
Grid check involves measuring the spacing between grid lines to ensure they meet the specified dimensions.
Inputs required for grid check include grid line spacing, grid line thickness, and overall grid dimensions.
Grid check can be done using tools like rulers, calipers, or specialized grid check templates.
Grid check is important in ensuring ali
Analyzing the powergrid involves studying its components, performance, and efficiency.
Start by examining the overall layout and structure of the powergrid
Analyze the distribution of power sources, transmission lines, and substations
Evaluate the efficiency of the powergrid in terms of energy loss and voltage stability
Use simulation software to model different scenarios and optimize the powergrid
Consider factors like ren...
C, c++ python and simple aptitude
A CMOS inverter is a type of digital logic gate that switches between high and low voltage levels.
CMOS stands for Complementary Metal-Oxide-Semiconductor
It consists of a PMOS (p-type metal-oxide-semiconductor) and NMOS (n-type metal-oxide-semiconductor) transistor connected in series
When the input is high, the PMOS transistor conducts and the output is low
When the input is low, the NMOS transistor conducts and the outp...
posted on 10 Jul 2024
I applied via Job Portal and was interviewed in Jan 2024. There was 1 interview round.
A C program to generate Fibonacci series
Declare variables to store current and previous Fibonacci numbers
Use a loop to calculate and print Fibonacci numbers
Handle edge cases like 0 and 1 separately
A up counter circuit is a digital circuit that counts upwards in binary sequence.
Use flip-flops to store the count value
Connect the output of one flip-flop to the clock input of the next flip-flop
Use logic gates to control the counting sequence
Add a reset input to clear the count when needed
I applied via campus placement at Motilal Nehru Institute National Institute of Technology (NIT), Allahabad and was interviewed before Aug 2023. There were 2 interview rounds.
Questions covering various aspects
A mood 3 counter is a device that tracks and displays the user's mood on a scale of 1-3.
Design a simple interface with 3 buttons for the user to input their mood (happy, neutral, sad)
Include a display screen to show the current mood level
Implement a reset button to clear the mood counter
Consider adding a visual indicator such as colored LEDs for each mood level
The three states refer to the three fundamental states of matter: solid, liquid, and gas.
Solid: particles are closely packed together and have a fixed shape and volume (e.g. ice)
Liquid: particles are close together but can move past each other, taking the shape of their container (e.g. water)
Gas: particles are far apart and move freely, filling the entire space of their container (e.g. air)
posted on 23 Feb 2025
I was interviewed before Feb 2024.
posted on 31 Mar 2015
IV characteristics of CMOS inverter show the relationship between input voltage and output current.
CMOS inverter has two transistors - NMOS and PMOS connected in series.
For low input voltage, NMOS is ON and PMOS is OFF, resulting in low output voltage.
For high input voltage, NMOS is OFF and PMOS is ON, resulting in high output voltage.
The transition between low and high output voltage occurs at the threshold voltage.
Th...
Set up time and hold time are timing requirements in digital circuits to ensure proper operation.
Set up time is the minimum time before the clock edge that the input signal must be stable.
Hold time is the minimum time after the clock edge that the input signal must be maintained stable.
Violating set up time can lead to incorrect data being latched.
Violating hold time can lead to metastability issues.
Examples: In a flip...
based on 2 interviews
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