Wafer Space Interview Questions and Answers

First was aptitude which had questions on analog, digital, network theory, microcontrollers, general aptitude question which was medium level which I clear & got one to one round. In interview he didn't ask much of interview question 1st question was on academic & design verification project, 2nd was on protocol timing diagram for which the interviewer wanted the exact print of specification sheet where my diagram was a little shabby,which made him upset & didn't continue to ask proper questions .

Q1. Counter code and waveform
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Q2. Fifo depth calculation.
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Q1. Cmos basic principle and working
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CMOS stands for Complementary Metal-Oxide-Semiconductor. It is a technology used in integrated circuits for digital logic functions.
• CMOS technology uses both NMOS and PMOS transistors to achieve low power consumption and high noise immunity.

• In CMOS, when one transistor is on, the other is off, reducing power consumption.

• CMOS circuits are widely used in microprocessors, memory chips, and other digital logic circuits.
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Q2. Conversion of gates using nand
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Converting gates using NAND gate
• NAND gate can be used to implement other logic gates like AND, OR, NOT

• To implement an AND gate using NAND gates, connect two NAND gates in series

• To implement an OR gate using NAND gates, connect two NAND gates in parallel

• To implement a NOT gate using NAND gate, connect the input directly to one input of the NAND gate and the other input to ground
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Q1. Nmos pmos working, drain and output characteristics
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Q2. Synchronous and asynchrnous clocking
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Normal Aptitude questions, We can prepare for it using general aptitude questions available in internet.

Q1. Technical Questions (Digital Electronics, Verilog, Computer Architecture)
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Q1. HR Discussion will just our introduction and some normal hr questions
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