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Wafer Space

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based on 41 Reviews

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Wafer Space FPGA and RTL Design Engineer Interview Questions and Answers

Updated 3 Dec 2024

Wafer Space FPGA and RTL Design Engineer Interview Experiences

1 interview found

FPGA and RTL Design Engineer Interview Questions & Answers

user image Anonymous

posted on 3 Dec 2024

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
-

I applied via LinkedIn and was interviewed in Nov 2024. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. Counter code and waveform
    • Add your answer
  • Q2. Fifo depth calculation.
    • Add your answer

Top trending discussions

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Interview Tips & Stories
2w
an operations executive
Job Market Seems to Be Opening Up Again!
I've been getting more interview calls recently, and after months of silence., it’s a relief! Things are looking better out there. Keep building your skills and applying, guys. Patience does pay off! For context: I have about 5 years of experience in the IT field, currently working as a security analyst (contract role) for the past 6 months. I've been applying for analyst roles at junior/mid-level positions open to hybrid and remote setups. Certifications I’ve done so far include CEH, CCNA, AWS Practitioner, and Splunk Essentials. What’s been your experience with job hunting lately? Let’s help each other out!
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Interview questions from similar companies

RTL Design Engineer Interview Questions & Answers

Ignitarium Technology Solutions user image Anonymous

posted on 15 Jan 2025

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
-

I applied via LinkedIn and was interviewed in Dec 2024. There was 1 interview round.

Round 1 - Technical 

(1 Question)

  • Q1. To write verilog code for counters and adders. Flipflops,latches,protocol
    • Add your answer

RTL Design and Verification Engineer Interview Questions & Answers

Mirafra Technologies user image VINEET KUMAR RAI

posted on 23 Aug 2024

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Approached by Company and was interviewed in Jul 2024. There was 1 interview round.

Round 1 - One-on-one 

(1 Question)

  • Q1. About work experience
    • Add your answer

RTL Design Engineer Interview Questions & Answers

AdeptChip Services user image Anonymous

posted on 18 Dec 2023

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
-

I applied via Naukri.com and was interviewed in Jun 2023. There were 2 interview rounds.

Round 1 - Technical 

(1 Question)

  • Q1. Total 3 rounds, self introduction, project related questions, all technical. Lint cdc synthesis related questions 3 Rd hr round general salary expectation and remaining discussions.
    • Add your answer
Round 2 - Coding Test 

Basic codes flipflop, reset synchronisation.

RTL Design Engineer Interview Questions & Answers

Mobiveil Technologies India user image Anonymous

posted on 16 Mar 2022

I applied via Naukri.com and was interviewed in Feb 2022. There were 2 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(1 Question)

  • Q1. Blocking non blocking, counter, asynchronous and synchronous reset, oops concepts, function and task
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - Keep trying beleive me it will surely happen.
More about working at Wafer Space

Wafer Space Interview FAQs

How many rounds are there in Wafer Space FPGA and RTL Design Engineer interview?
Wafer Space interview process usually has 1 rounds. The most common rounds in the Wafer Space interview process are Technical.
What are the top questions asked in Wafer Space FPGA and RTL Design Engineer interview?

Some of the top questions asked at the Wafer Space FPGA and RTL Design Engineer interview -

  1. Counter code and wavef...read more
  2. Fifo depth calculati...read more

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Wafer Space FPGA and RTL Design Engineer Interview Process

based on 1 interview

Interview experience

4
  
Good
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Wafer Space Salaries in India
Senior Software Engineer
52 salaries
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₹7.2 L/yr - ₹19 L/yr

Design Engineer
30 salaries
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₹4.7 L/yr - ₹20 L/yr

Design Engineer II
18 salaries
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₹7 L/yr - ₹23.5 L/yr

Software Engineer
17 salaries
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₹4.2 L/yr - ₹11.5 L/yr

Technical Lead
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₹13 L/yr - ₹38 L/yr

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