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posted on 29 Jun 2023
I applied via Recruitment Consulltant and was interviewed in May 2023.
Very basic questions on digital and verilog and sv
posted on 22 Aug 2024
I applied via LinkedIn and was interviewed in Jul 2024.
I applied via Approached by Company and was interviewed in Apr 2023.
posted on 28 Jul 2023
I applied via LinkedIn and was interviewed in Jun 2023.
Group discussion on mainly digital, verilog, system verilog. Was approx 2 hours.
Same as first round some 50% questions are repeated from first round. Was approx 2 hours
I applied via Campus Placement and was interviewed in Nov 2022.
Assignment related to battery design for a given conditions
What government policies can be implemented for circular economy?
I applied via Campus Placement and was interviewed in Dec 2022.
Digital Verilog and Sv and aptitude
posted on 4 Oct 2023
I applied via Campus Placement and was interviewed in Dec 2023.
Apptitide, Digital Electronics, physical Design concepts.
based on 1 review
Rating in categories
Verification Engineer
42
salaries
| ₹2 L/yr - ₹10 L/yr |
Physical Design Engineer
23
salaries
| ₹2.4 L/yr - ₹11.9 L/yr |
RTL Design Engineer
8
salaries
| ₹2.4 L/yr - ₹6 L/yr |
Design Engineer
8
salaries
| ₹4.7 L/yr - ₹14 L/yr |
Data Scientist
7
salaries
| ₹4 L/yr - ₹11 L/yr |
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