10+ VLSI Design and Verification Engineer Interview Questions and Answers

1 NAND gate can be used to make 2 combinations of inverter.

• A NAND gate can be used to make an inverter by connecting both inputs together.

• The output of the NAND gate will be the inverted input.

• Thus, there are 2 possible combinations of inverter using just 1 NAND gate.

Ring, Johnson, Sync and Async counters are types of digital counters used in electronics.

• Ring counter is a circular shift register with only one flip-flop set to 1 at a time.

• Johnson counter is a modified ring counter with complemented output of the last flip-flop fed back to the input.

• Sync counters use a common clock signal for all flip-flops while Async counters use individual clock signals.

• Examples of Sync counters are binary, decade, and BCD counters while examples of Asyn...read more

Blocking waits for a process to complete before moving to the next, while non-blocking allows for concurrent execution.

• Blocking assignments use '=' operator, while non-blocking use '<=' operator.

• Blocking assignments are executed sequentially, while non-blocking assignments are executed concurrently.

• Blocking assignments are used for combinational logic, while non-blocking assignments are used for sequential logic.

• Example: Blocking - a = b; Non-blocking - a <= b;

Universal gates are logic gates that can be used to implement any Boolean function.

• Universal gates are NAND and NOR gates.

• They are called universal because they can be used to implement any Boolean function.

• This is because NAND and NOR gates are functionally complete.

• This means that any Boolean function can be expressed using only NAND or NOR gates.

• Other gates like AND, OR, and NOT gates are not functionally complete.

• For example, an AND gate cannot implement a NOT function.

• Un...read more

Flip-flop conversion from DFF to JKFF

• Determine the excitation table for JK flip-flop

• Use the excitation table to derive the input equations for J and K

• Replace D input with J and K inputs in DFF circuit

• Verify the functionality of the converted JKFF circuit

Tasks are concurrent and functions are sequential in execution.

• Tasks can run concurrently and can communicate with each other using shared variables.

• Functions are executed sequentially and return a value to the calling function.

• Tasks can be used for parallel processing and can be scheduled by the operating system.

• Functions are used for modular programming and can be called from other functions or tasks.

• Example: A task can be used to read data from a sensor while a function ca...read more

A 4:1 mux can be implemented using two 2:1 muxes.

• Connect the select line of both 2:1 muxes to the same select line of the 4:1 mux.

• Connect the output of one 2:1 mux to the input of the other 2:1 mux.

• Connect the inputs of both 2:1 muxes to the corresponding inputs of the 4:1 mux.

• The output of the 4:1 mux is the output of the second 2:1 mux.

Verilog supports various data types including integer, real, reg, wire, and time.

• Integer data type is used for whole numbers

• Real data type is used for decimal numbers

• Reg data type is used for sequential logic

• Wire data type is used for combinational logic

• Time data type is used for simulation time

• Data types can be declared using keywords like 'integer', 'real', 'reg', 'wire', and 'time'

• Data types can also be declared with bit width, such as 'integer [7:0]'

• Data types can be assi...read more

Latch is level sensitive and stores data temporarily, while flip-flop is edge triggered and stores data permanently.

• Latch is level sensitive, while flip-flop is edge triggered

• Latch stores data temporarily, while flip-flop stores data permanently

• Latch has a transparent latch, while flip-flop has a clocked latch

Tasks are parallelizable and can be executed concurrently, while functions are sequential and executed in a linear manner.

• Tasks can be executed in parallel, while functions are executed sequentially.

• Tasks can have multiple entry points, while functions have only one entry point.

• Tasks can have multiple exit points, while functions have only one exit point.

• Tasks can be called multiple times concurrently, while functions can only be called sequentially.

• Example: In SystemVerilog,...read more