Upload Button Icon Add office photos
Premium Employer

i

This company page is being actively managed by Tessolve Semiconductor Team. If you also belong to the team, you can get access from here

Tessolve Semiconductor Verified Tick

Compare button icon Compare button icon Compare

Filter interviews by

Tessolve Semiconductor Post Silicon Validation Engineer Interview Questions, Process, and Tips

Updated 18 Nov 2024

Top Tessolve Semiconductor Post Silicon Validation Engineer Interview Questions and Answers

View all 6 questions

Tessolve Semiconductor Post Silicon Validation Engineer Interview Experiences

5 interviews found

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
-

I applied via Campus Placement and was interviewed before Jan 2023. There were 2 interview rounds.

Round 1 - Aptitude Test 

Circuit theory, networks, Diode, Digital, Opamp

Round 2 - One-on-one 

(5 Questions)

  • Q1. Basics of analog 0and digital
  • Q2. Types of clipper circuit
  • Ans. 

    A clipper circuit is an electronic circuit that limits or clips the voltage level of a waveform.

    • There are two types of clipper circuits: positive clipper and negative clipper.

    • Positive clipper circuit limits the positive half of the input waveform.

    • Negative clipper circuit limits the negative half of the input waveform.

    • Diodes are commonly used in clipper circuits to perform the clipping operation.

    • Examples of clipper circ...

  • Answered by AI
  • Q3. Types of clamper circuit
  • Ans. 

    A clamper circuit is used to shift the DC level of a signal without changing its shape.

    • Positive Clamper: shifts the DC level of the input signal to a higher level

    • Negative Clamper: shifts the DC level of the input signal to a lower level

    • Biased Clamper: shifts the DC level of the input signal to a desired level using a biasing voltage

    • Diode Clamper: uses diodes to clamp the input signal to a specific DC level

  • Answered by AI
  • Q4. Clipper with the help of opamp
  • Ans. 

    Clipper with the help of opamp is a technique used to limit the output voltage of a signal.

    • Clipper circuit is used to limit the voltage level of a signal by clipping off the peaks.

    • Opamp (operational amplifier) is a high-gain electronic amplifier used to amplify and manipulate signals.

    • By combining a clipper circuit with an opamp, the opamp can be used to control the clipping level and shape the output signal.

    • The opamp c...

  • Answered by AI
  • Q5. Clamper with transistor
  • Ans. 

    A clamper circuit is used to shift the DC level of a signal.

    • A clamper circuit consists of a diode and a capacitor.

    • It is used to add or subtract a DC voltage to a signal.

    • The transistor can be used in a clamper circuit to control the clamping voltage.

    • The transistor acts as a switch to control the charging and discharging of the capacitor.

    • Example: A clamper circuit with a transistor can be used to shift the DC level of an...

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - Nice interview
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Referral and was interviewed before Nov 2023. There were 2 interview rounds.

Round 1 - Technical 

(2 Questions)

  • Q1. Related to the op amp circuit outputs
  • Q2. Flip flops related basic questions
Round 2 - Technical 

(2 Questions)

  • Q1. Digital circuits basics
  • Q2. Analog circuit op amp and diode basics

Interview Preparation Tips

Topics to prepare for Tessolve Semiconductor Post Silicon Validation Engineer interview:
  • Digital circuit
  • analog circuit
  • network theory
Interview preparation tips for other job seekers - Be strong in fundamentals

Post Silicon Validation Engineer Interview Questions Asked at Other Companies

Q1. Input fre is 50MHz and I want half of the frequency at output des ... read more
asked in UST
Q2. What is the difference between RAM and ROM
Q3. Share your knowledge about PN meter, DSO, DMM, Power supply etc.. ... read more
asked in UST
Q4. What is bios in computer system
asked in UST
Q5. What is registers in computer system

I applied via Recruitment Consulltant and was interviewed in Oct 2022. There were 5 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Assignment 

First round is Online technical assignment.

Round 3 - Technical 

(2 Questions)

  • Q1. Through team call they will take your interview.
  • Q2. Your final year project, any work experience, analog, digital, basic circuit switch(like bjt,MOSFET,diode,inductor, capacitor) knowledge and problem.
Round 4 - Technical 

(1 Question)

  • Q1. Same thing but higher authority will take your interview.
Round 5 - HR 

(1 Question)

  • Q1. About salary discussion.

Interview Preparation Tips

Interview preparation tips for other job seekers - Get good knowledge of electronic company and circuit. Show the confidence that you are ready to learn new thing and work for that company.
Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via LinkedIn and was interviewed before Mar 2023. There were 2 interview rounds.

Round 1 - Technical 

(4 Questions)

  • Q1. Characteristics of diod, Amplifier,RLC circuits, Digital an Analog electronics from basics to advanced level questions
  • Q2. What is op amp and it's applications
  • Ans. 

    Op amp stands for operational amplifier, used in various electronic circuits for amplification, filtering, signal conditioning, etc.

    • Op amp is a high-gain electronic voltage amplifier with differential inputs and single output.

    • It is commonly used in audio amplifiers, signal conditioning circuits, filters, oscillators, etc.

    • Op amps can be used in instrumentation amplifiers, voltage followers, integrators, differentiators,...

  • Answered by AI
  • Q3. Input Voltage is 50v,I want 20v at output design a circuit
  • Q4. Input fre is 50MHz and I want half of the frequency at output design the circuit
  • Ans. 

    Use a flip-flop to divide the frequency by 2.

    • Use a D flip-flop with the input connected to the clock signal and the output connected back to the D input.

    • The output frequency will be half of the input frequency (25MHz).

  • Answered by AI
Round 2 - Technical 

(1 Question)

  • Q1. In detail explanation of every concept.

Interview Preparation Tips

Interview preparation tips for other job seekers - Concentrate on DE and AE, Network theory.

Tessolve Semiconductor interview questions for designations

 Design Engineer

 (2)

 PCB Design Engineer

 (2)

 Verification Engineer

 (1)

 Design & Verification Engineer

 (4)

 Test Engineer

 (7)

 Software Engineer

 (2)

 Softwaretest Engineer

 (1)

 Software Development Engineer

 (1)

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via AmbitionBox and was interviewed before Feb 2023. There were 2 interview rounds.

Round 1 - Assignment 

Digital Fundamentals.
Transistor with Relay circuit.

Round 2 - Technical 

(1 Question)

  • Q1. Transistor with relay circuit I2C C++

Interview Preparation Tips

Interview preparation tips for other job seekers - Basic understanding of VLSI Testing

Get interview-ready with Top Tessolve Semiconductor Interview Questions

Interview questions from similar companies

Interview experience
3
Average
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. Toggle the bits of given input
  • Ans. 

    Toggle the bits of given input

    • Create a mask with all bits set to 1

    • XOR the input with the mask to toggle the bits

    • Repeat the process for each bit position

  • Answered by AI
  • Q2. Clear the set bit
Round 2 - Technical 

(2 Questions)

  • Q1. Print the star pattern
  • Ans. 

    Print a star pattern using loops

    • Use nested loops to print the desired pattern

    • Increment the number of stars in each row to create the pattern

    • Example: for a pattern with 5 rows - * , ** , *** , **** , *****

  • Answered by AI
  • Q2. Microprocessor microcontroller topics are asked

Skills evaluated in this interview

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via campus placement at Netaji Subhas Institute of Technology (NSIT) and was interviewed in Sep 2024. There were 2 interview rounds.

Round 1 - Aptitude Test 

Basic aptitude-10 question,digital moderate -Question,analog moderate -10 question,verilog and system verilog -10 question

Round 2 - One-on-one 

(3 Questions)

  • Q1. Latches and flip flop all characteristics equation and proof of the characteristics equation in flip flop.applications of flip flop
  • Q2. OOPS,INHERITANCE,VERILOG,BLOCKING - NON BLOCKING ASSIGNMENT OPERATOR and all the basic operations of verilog .
  • Q3. Discussion on work experience.

Interview Preparation Tips

Interview preparation tips for other job seekers - Be bonafide with your fundamentals core of digital circuits and design .
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(1 Question)

  • Q1. They asked from Digital, COA
Round 2 - Technical 

(1 Question)

  • Q1. They asked the concepts of COA
Round 3 - HR 

(1 Question)

  • Q1. First started with Puzzle and then about company
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
-
Result
-

I applied via Referral and was interviewed in Apr 2024. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. Simple FSM given similar to mux and asked for testcases and assertions.
  • Q2. Coverage to write transitions of states.
  • Ans. 

    Coverage-driven verification techniques are used to ensure all possible state transitions are exercised.

    • Coverage metrics like state, transition, and toggle coverage can be used to track the completeness of state transitions.

    • Writing directed tests to cover specific state transitions can help achieve higher coverage.

    • Random stimulus generation can also be used to explore different state transitions.

    • Functional coverage can...

  • Answered by AI
Interview experience
3
Average
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Jan 2024. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. Basics of analog , digital and vlsi
  • Q2. On face to face interview, they asked me abt my projects , digital, little analog , vlsi ( verilog), microcontrollers and c programming

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare well on your basics

Tessolve Semiconductor Interview FAQs

How many rounds are there in Tessolve Semiconductor Post Silicon Validation Engineer interview?
Tessolve Semiconductor interview process usually has 2-3 rounds. The most common rounds in the Tessolve Semiconductor interview process are Technical, Assignment and Resume Shortlist.
How to prepare for Tessolve Semiconductor Post Silicon Validation Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Tessolve Semiconductor. The most common topics and skills that interviewers at Tessolve Semiconductor expect are Python, Embedded C, C++, Debugging and Embedded Systems.
What are the top questions asked in Tessolve Semiconductor Post Silicon Validation Engineer interview?

Some of the top questions asked at the Tessolve Semiconductor Post Silicon Validation Engineer interview -

  1. Input fre is 50MHz and I want half of the frequency at output design the circ...read more
  2. What is op amp and it's applicati...read more
  3. Clipper with the help of op...read more

Tell us how to improve this page.

Tessolve Semiconductor Post Silicon Validation Engineer Interview Process

based on 5 interviews

1 Interview rounds

  • Technical Round
View more

Interview Questions from Similar Companies

KPIT Technologies Interview Questions
3.4
 • 294 Interviews
Cyient Interview Questions
3.6
 • 284 Interviews
Qualcomm Interview Questions
3.8
 • 274 Interviews
Texas Instruments Interview Questions
4.1
 • 124 Interviews
Synopsys Interview Questions
3.8
 • 89 Interviews
Einfochips Interview Questions
3.4
 • 71 Interviews
View all
Tessolve Semiconductor Post Silicon Validation Engineer Salary
based on 177 salaries
₹3.2 L/yr - ₹12.5 L/yr
13% less than the average Post Silicon Validation Engineer Salary in India
View more details

Tessolve Semiconductor Post Silicon Validation Engineer Reviews and Ratings

based on 31 reviews

4.1/5

Rating in categories

3.8

Skill development

3.9

Work-life balance

3.7

Salary

4.2

Job security

4.1

Company culture

3.7

Promotions

3.7

Work satisfaction

Explore 31 Reviews and Ratings
Post Silicon Validation Engineer
177 salaries
unlock blur

₹3.2 L/yr - ₹12.5 L/yr

Design Engineer
133 salaries
unlock blur

₹2.5 L/yr - ₹12 L/yr

Test Engineer
104 salaries
unlock blur

₹3 L/yr - ₹10.1 L/yr

Software Engineer
92 salaries
unlock blur

₹3.5 L/yr - ₹15 L/yr

Senior Design Engineer
89 salaries
unlock blur

₹6.3 L/yr - ₹26.5 L/yr

Explore more salaries
Compare Tessolve Semiconductor with

Sankalp Semiconductor

3.7
Compare

Einfochips

3.3
Compare

Mistral Solutions

3.7
Compare

KPIT Technologies

3.4
Compare
Did you find this page helpful?
Yes No
write
Share an Interview