i
SmartSoC Solutions
Filter interviews by
I applied via LinkedIn and was interviewed before Mar 2023. There were 3 interview rounds.
Top trending discussions
posted on 31 Dec 2024
I was interviewed in Dec 2024.
posted on 29 Nov 2024
Toggle the bits of given input
Create a mask with all bits set to 1
XOR the input with the mask to toggle the bits
Repeat the process for each bit position
Print a star pattern using loops
Use nested loops to print the desired pattern
Increment the number of stars in each row to create the pattern
Example: for a pattern with 5 rows - * , ** , *** , **** , *****
posted on 2 Oct 2024
I applied via campus placement at Netaji Subhas Institute of Technology (NSIT) and was interviewed in Sep 2024. There were 2 interview rounds.
Basic aptitude-10 question,digital moderate -Question,analog moderate -10 question,verilog and system verilog -10 question
posted on 24 Sep 2024
I applied via campus placement at Amrita Vishwa Vidyapeetham, Amritapuri Campus and was interviewed in Aug 2024. There were 4 interview rounds.
posted on 12 Aug 2024
I applied via campus placement at Birla Institute of Technology and Science (BITS), Pilani and was interviewed in Jul 2024. There was 1 interview round.
To predict if a 32 bit number is divisible by 8, design a circuit using gates.
Use a circuit with AND, OR, and NOT gates to check if the last three bits of the number are all zeros.
If the last three bits are zeros, then the number is divisible by 8.
For example, if the 32 bit number is 11010000, the last three bits are zeros, so it is divisible by 8.
posted on 23 May 2024
posted on 7 May 2024
I applied via Referral and was interviewed in Apr 2024. There was 1 interview round.
Coverage-driven verification techniques are used to ensure all possible state transitions are exercised.
Coverage metrics like state, transition, and toggle coverage can be used to track the completeness of state transitions.
Writing directed tests to cover specific state transitions can help achieve higher coverage.
Random stimulus generation can also be used to explore different state transitions.
Functional coverage can...
posted on 29 Feb 2024
I applied via Campus Placement and was interviewed in Jan 2024. There was 1 interview round.
posted on 15 Nov 2022
I applied via LinkedIn and was interviewed in Nov 2023. There were 3 interview rounds.
Just the basics are covered like percentages and profit and loss.
based on 1 review
Rating in categories
Physical Design Engineer
31
salaries
| ₹2 L/yr - ₹9.5 L/yr |
Senior Engineer
27
salaries
| ₹9 L/yr - ₹25 L/yr |
Verification Engineer
19
salaries
| ₹7.6 L/yr - ₹15.4 L/yr |
Design & Verification Engineer
10
salaries
| ₹4.5 L/yr - ₹12 L/yr |
Embedded Engineer
9
salaries
| ₹3.5 L/yr - ₹12.4 L/yr |
TCS
Infosys
Wipro
HCLTech