MosChip Technologies Physical Design Engineer Trainee Interview Questions and Answers

10 questions on aptitude

Q1. What is inverter?
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An inverter is a basic building block in digital circuit design that converts a high voltage input signal to a low voltage output signal.
• Inverters are used to implement logic gates in digital circuits.

• They have one input and one output.

• The output of an inverter is the logical complement of its input.

• Inverters are essential for signal processing and amplification in electronic devices.

• Example: CMOS inverter, TTL inverte
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Q2. What is clock gating?
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Clock gating is a power-saving technique used in digital design to disable the clock signal to certain parts of a circuit when they are not in use.
• Clock gating helps reduce power consumption by stopping the clock signal to unused parts of the circuit.

• It involves inserting logic gates in the clock path to control when the clock signal is enabled or disabled.

• Example: In a processor, clock gating can be used to disable th...read more
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Q1. Sv hvm questions on constraiants and assertions
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Q2. Questions on resume projects
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Q1. Questions on protocols
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Q2. Sv uvm questions
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Q1. Salary and pckge discussion
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Q2. Details on client interview
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Q1. Projects and challenges
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Q2. Sv uvm basics
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Q1. Toggle the bits of given input
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Toggle the bits of given input
• Create a mask with all bits set to 1

• XOR the input with the mask to toggle the bits

• Repeat the process for each bit position
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Q2. Clear the set bit
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Q1. Print the star pattern
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Print a star pattern using loops
• Use nested loops to print the desired pattern

• Increment the number of stars in each row to create the pattern

• Example: for a pattern with 5 rows - * , ** , *** , **** , *****
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Q2. Microprocessor microcontroller topics are asked
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Basic aptitude-10 question,digital moderate -Question,analog moderate -10 question,verilog and system verilog -10 question

Q1. Latches and flip flop all characteristics equation and proof of the characteristics equation in flip flop.applications of flip flop
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Q2. OOPS,INHERITANCE,VERILOG,BLOCKING - NON BLOCKING ASSIGNMENT OPERATOR and all the basic operations of verilog .
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Q3. Discussion on work experience.
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40 aptitude qns and some mcqs on basic programming

Q1. I was asked to write two sum, palindrome function and merge sort code in whatever language I'm comfortable in
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Q2. Two sum- return true or false
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Given an array of integers, determine if there are two numbers that add up to a specific target.
• Iterate through the array and store each element in a hash set.

• For each element, check if the difference between the target and the element exists in the hash set.

• If the difference exists, return true; otherwise, continue iterating.

• Example: nums = [2, 7, 11, 15], target = 9. The function should return true as 2 + 7 = 9.
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Q3. Merge sort function code
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Q4. Palindromic string or not
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Q1. Asked the working experience and the related skills to the new job
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Q1. Coding questions in Verilog, Systemverilog, random constraints such as how to write a onehot in different ways
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Q1. Asked the expectation of the base salary and overall compensation
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Q1. Simple FSM given similar to mux and asked for testcases and assertions.
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Q2. Coverage to write transitions of states.
Ans. 
Coverage-driven verification techniques are used to ensure all possible state transitions are exercised.
• Coverage metrics like state, transition, and toggle coverage can be used to track the completeness of state transitions.

• Writing directed tests to cover specific state transitions can help achieve higher coverage.

• Random stimulus generation can also be used to explore different state transitions.

• Functional coverage can...read more
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