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Intel Physical Design Engineer Trainee Interview Questions and Answers

Updated 28 Jul 2024

Intel Physical Design Engineer Trainee Interview Experiences

2 interviews found

Interview experience
3
Average
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
No response

I applied via Campus Placement and was interviewed in Jan 2024. There were 2 interview rounds.

Round 1 - Aptitude Test 

10 questions on aptitude

Round 2 - One-on-one 

(2 Questions)

  • Q1. What is inverter?
  • Ans. 

    An inverter is a basic building block in digital circuit design that converts a high voltage input signal to a low voltage output signal.

    • Inverters are used to implement logic gates in digital circuits.

    • They have one input and one output.

    • The output of an inverter is the logical complement of its input.

    • Inverters are essential for signal processing and amplification in electronic devices.

    • Example: CMOS inverter, TTL inverte

  • Answered by AI
  • Q2. What is clock gating?
  • Ans. 

    Clock gating is a power-saving technique used in digital design to disable the clock signal to certain parts of a circuit when they are not in use.

    • Clock gating helps reduce power consumption by stopping the clock signal to unused parts of the circuit.

    • It involves inserting logic gates in the clock path to control when the clock signal is enabled or disabled.

    • Example: In a processor, clock gating can be used to disable th...

  • Answered by AI

Interview Preparation Tips

Topics to prepare for Intel Physical Design Engineer Trainee interview:
  • CMOS

Skills evaluated in this interview

Interview experience
3
Average
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
No response

I applied via Campus Placement and was interviewed in Jan 2024. There were 2 interview rounds.

Round 1 - Aptitude Test 

10 questions of aptitude with one hour time

Round 2 - One-on-one 

(2 Questions)

  • Q1. What is inverter?
  • Ans. 

    An inverter is a basic building block in digital circuit design that converts a high voltage input signal into a low voltage output signal.

    • Inverters are used to implement logic gates in digital circuits.

    • They have one input and one output.

    • The output of an inverter is the logical complement of its input.

    • Inverters are essential for signal processing and amplification in electronic devices.

    • Example: CMOS inverter, TTL inver

  • Answered by AI
  • Q2. What is clock gating?
  • Ans. 

    Clock gating is a technique used in digital design to reduce power consumption by selectively stopping the clock signal to certain parts of a circuit when they are not in use.

    • Clock gating involves inserting logic gates in the clock signal path to control when the clock signal is allowed to reach certain parts of the circuit.

    • It helps in reducing dynamic power consumption by preventing unnecessary switching activity in t...

  • Answered by AI

Skills evaluated in this interview

Physical Design Engineer Trainee Interview Questions Asked at Other Companies

Q1. if you have two clock inputs to the register what issues do you f ... read more
Q2. What are Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current La ... read more
Q3. What strategies can be implemented to control congestion during p ... read more
Q4. Why is Slack different after STA in Prime Time compared to PNR ou ... read more
Q5. Why don't we consider hold analysis during placement stage?

Interview questions from similar companies

I applied via Recruitment Consulltant and was interviewed before Aug 2021. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. What is aspect ratio?
  • Ans. 

    Aspect ratio is the ratio of an object's width to its height.

    • Aspect ratio is commonly used in design and engineering to maintain proportionality.

    • It is often expressed as a ratio, such as 16:9 for a widescreen TV.

    • Aspect ratio can affect the visual perception and usability of a product.

    • It is important to consider aspect ratio when designing graphics or layouts for different devices or mediums.

  • Answered by AI
  • Q2. How do you decide stackup?
  • Ans. 

    Stackup is decided based on the number of layers, signal integrity requirements, and manufacturing constraints.

    • Consider the number of layers required for the design

    • Evaluate signal integrity requirements and impedance control

    • Take into account manufacturing constraints such as minimum trace width and spacing

    • Balance cost and performance

    • Use simulation tools to optimize the stackup

    • Consult with PCB fabricators for their reco

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - Need to improve skills on Highspeed concepts

I applied via Campus Placement and was interviewed before Jan 2021. There were 3 interview rounds.

Round 1 - Technical 

(1 Question)

  • Q1. What is a cache? What does tag used for in a cache?
  • Ans. 

    A cache is a high-speed data storage layer that stores frequently accessed data to reduce access time. A tag is used to identify the location of data in the cache.

    • Cache is a temporary storage that holds frequently accessed data

    • It reduces the access time by providing faster access to data

    • Tag is used to identify the location of data in the cache

    • Tag is a part of the cache memory address

    • Cache can be implemented in hardware...

  • Answered by AI
Round 2 - Coding Test 

C Coding questions

Round 3 - HR 

(3 Questions)

  • Q1. What is your family background?
  • Q2. What are your strengths and weaknesses?
  • Q3. Tell me about yourself.

Interview Preparation Tips

Interview preparation tips for other job seekers - Revise Computer Architecture and Verilog for interview process

Skills evaluated in this interview

Interview Preparation Tips

Round: Test
Experience: Questions were from digital Electronics which included realization of counters using JK FF,Sequence detector,Boolean expression reduction,One shot and drawing waveforms of some digital circuits.Questions were also their from pipelinig,finding out MIPS,power consumption of two processors,Small signal analysis of MOSFETs,Buffer using CMOS ,finding out the type of filter given block diagram(control theory).Questions were easy and required step by step realization.
Tips: Prepare digital Electronics very well as it has 50% weightage in paper. Pipelinig is important. Some basics concepts of CMOS is very necessary.
Duration: 1hr 15 min minute
Total Questions: 12

Round: Technical Interview
Experience: First they asked to introduce yourself.
Then they asked about projects & Internship.
STA,EEPROM,EPROM,DRAM,SRAM,CACHE Memory,Pipelining,DMA was asked in depth.
Difference between clock skew and Jitter.
Asked whether I know any Hardware Languages.
XOR gate using 2:1 MUX.
Gave a waveform,had to realize using DFF and considering the delay.
Tips: Study STA very well.
Questions will be asked in depth from any topic.

Round: HR Interview
Experience: Family Background
Why NXP
Hobbies


Skill Tips: Study Digital Electronics very well
Skills: Analog Electronics, Microprocessor, Vlsi Basics, Digital Circuits
College Name: BIT Mesra

Interview Preparation Tips

Round: Test
Experience: Questions were from Digital Electronics,Microprocessors and some from CMOS.
50% Digital Electronics.
1 X Output waveform drawing from circuit of FFs & gates
1 X Realize inverter from given two blocks
1 X CMOS implementation of gates
1 X Realize digital circuit for given waveform
1 X MIPS & Pipelining
1 X Processors power Dissipation calculation
1 X Small Signal analysis of CMOS
1 X Compare two given buffers circuits(CMOS)
1 X Transfer function calculation(Control Theory)
1 X Counter using JK FF
1 X Sequence Detector

Tips: Study digital electronics very well.

Duration: 1 hr 45 min minute
Total Questions: 12

Round: Technical Interview
Experience: Indroduction
Projects & Internship
Discussions in DEPTH on:
Pipelining
STA
MIPS
Memory(flash memory,DRAM,SRAM)
CACHE Memory
DMA
Digital circuit realization for given waveform
XOR Gate using 2:1 MUX
Tips: Prepare Digital electronics and Microprocessors very well.Sta is very important.Panel will go deep into the topics to check ur technical knowledge.
TIPS: Be confident and your opinion should be strong.Stand by what you say.Do not get confused.And when panel asks to solve any digital circuits, speak loud what is in your mind and what approach you are using.Be honest.

Round: HR Interview
Experience: Family Background
Why Freescale


Skills: Static Timing Analysis (STA), Memory, CMOS Circuits, Microprocessor, Digital Circuits
College Name: BIT Mesra
Motivation: I had interest in core electronics

Design Engineer Interview Questions & Answers

Texas Instruments user image Sai Vihari Chaturvedula

posted on 28 Aug 2016

I applied via Campus Placement

Interview Preparation Tips

Round: Resume Shortlist
Experience: Resume is not given any due importance in selection for further rounds . But honesty is very important as it counts once you are selected for HR round .
Tips: Try to be one hundred percent honest . And put your projects and course work in the beginning. They don't care your POR s and extra curricular activities.

Round: Test
Experience: Hardware - Questions are mainly from ELECTRICAL CIRCUITS (RLC ckts) , Analog ckts. Amplifiers , Opamps , digital system design . Aptitude section is very easy . Hardware section is tough .I felt Signal processing was easier , indeed I got selected for that profile .
Tips: Prepare thoroughly these courses :- EMC , DIGITAL SYSTEMS, NETWORKS AND SYSTEMS,ANALOG & DIGITAL SIGNAL PROCESSING , ANALOG CKTS COURSES .THAT SHOULD BE ENOUGH .
Duration: 90 - Signal Processing minutes
Total Questions: 120 - Hardware and aptitude

Round: Group Discussion
Experience: No
Tips: No

Duration: 2
College Name: IIT Madras

Interview Preparation Tips

Round: Test
Experience: Test was subjective and questions were asked from basic analog, digital design, VHDL and VLSI circuits.

Round: Technical Interview
Experience: Had 3 technical interviews each around 25 minutes. They asked me about my summer internship and
questions from microcontroller architecture and its interfacing. Then they asked me the questions
from those problems which I didn't attempt in the written test.
Tips: For electrical students, it might be a bit challenging. I took an elective on Microcontroller in 7th sem which
helped me a lot during the interview. You might want to brush up your concepts of 8085, digital, OPAMPs
and analog

Round: HR Interview
Experience: My family background and my future goals were asked. They asked me about
my internship project and wanted to know what I learnt during the internship. Then I asked a few questions
from them about the company work culture and growth opportunities

College Name: IIT Roorkee

Interview Questionnaire 

2 Questions

  • Q1. Why are you interested in freescale ?
  • Ans. 

    I am interested in Freescale because of their innovative technology and strong reputation in the industry.

    • Freescale has a history of developing cutting-edge technology

    • Their reputation in the industry is strong and respected

    • I am excited about the opportunity to work with a company that values innovation and excellence

  • Answered by AI
  • Q2. Hobbies, family background etc. and future plans

Interview Preparation Tips

Round: Test
Total Questions: 15

Round: Technical Interview
Experience: Panel discussed questions attempted incorrectly or not attempted. Topics asked separately: RAM, MOSFET, Memory, Interrupts, FIFO etc.Few puzzles were also asked.

General Tips: Topics that should be covered: Digital Electronics, Microprocessors, Basic Electronics, K Map and FSM questions.
Skills:
College Name: BIT MESRA

Interview Preparation Tips

Round: Test
Experience: The selection procedure is a test followed by tech interview and an HR interview.
The test had two parts:
 Aptitude (common across all profiles)
 A tech. test (separate for each profile)

Round: Interview
Experience: The tech interview was the important one and the HR interview was just about knowing the student and vice-versa. The tech interview was more concentrated on the basics and more importance was given to the approach of solving the problem rather than solving the problem itself.
No CGPA cutoff.

Round: Interview
Experience: Not very important.

General Tips: The work is well structured and executed. There is a lot of opportunity for more technical learning. Interns are also included into the teams and this helps the intern on knowing about the things going around them and gets an overall view of how things work.
As a whole, the work is very good, and exceeds all the expectations of the students.
College Name: IIT Madras

Intel Interview FAQs

How many rounds are there in Intel Physical Design Engineer Trainee interview?
Intel interview process usually has 2 rounds. The most common rounds in the Intel interview process are Aptitude Test and One-on-one Round.
What are the top questions asked in Intel Physical Design Engineer Trainee interview?

Some of the top questions asked at the Intel Physical Design Engineer Trainee interview -

  1. What is clock gati...read more
  2. What is invert...read more

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Intel Physical Design Engineer Trainee Interview Process

based on 2 interviews

Interview experience

3
  
Average
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Intel Physical Design Engineer Trainee Salary
based on 4 salaries
₹5 L/yr - ₹6 L/yr
59% more than the average Physical Design Engineer Trainee Salary in India
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based on 1 review

3.0/5

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4.0

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3.0

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3.0

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