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Dpiind Services Physical Design Engineer Trainee Interview Questions and Answers

Updated 7 Feb 2025

Dpiind Services Physical Design Engineer Trainee Interview Experiences

2 interviews found

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I was interviewed in Aug 2024.

Round 1 - Technical 

(2 Questions)

  • Q1. Apti+Technical mcqs Setup ,hold problems, fp ,placement ,congestion ,routing issues ,difference btwn hierarchical & flat designs
  • Q2. Interview PD inputs ,all the stages of pd asked in detail ,all sanity checks and issues in each stage
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I was interviewed before Feb 2024.

Round 1 - Technical 

(2 Questions)

  • Q1. What is the process for creating a CMOS stick diagram?
  • Q2. What are Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current Law (KCL)?
Round 2 - One-on-one 

(2 Questions)

  • Q1. What projects did you work on during your training?
  • Q2. What is the ASIC flow?

Physical Design Engineer Trainee Interview Questions Asked at Other Companies

Q1. What are Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current La ... read more
Q2. What strategies can be implemented to control congestion during p ... read more
Q3. Why is Slack different after STA in Prime Time compared to PNR ou ... read more
Q4. Why don't we consider hold analysis during placement stage?
Q5. What is the process for creating a CMOS stick diagram?

Dpiind Services Interview FAQs

How many rounds are there in Dpiind Services Physical Design Engineer Trainee interview?
Dpiind Services interview process usually has 1-2 rounds. The most common rounds in the Dpiind Services interview process are Technical and One-on-one Round.
What are the top questions asked in Dpiind Services Physical Design Engineer Trainee interview?

Some of the top questions asked at the Dpiind Services Physical Design Engineer Trainee interview -

  1. What are Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current Law (KC...read more
  2. What is the process for creating a CMOS stick diagr...read more
  3. What is the ASIC fl...read more

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Dpiind Services Physical Design Engineer Trainee Interview Process

based on 2 interviews

Interview experience

4.5
  
Good
View more

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Dpiind Services Physical Design Engineer Trainee Reviews and Ratings

based on 2 reviews

4.5/5

Rating in categories

5.0

Skill development

5.0

Work-life balance

4.5

Salary

5.0

Job security

5.0

Company culture

5.0

Promotions

5.0

Work satisfaction

Explore 2 Reviews and Ratings
Design Engineer
4 salaries
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₹2.4 L/yr - ₹20 L/yr

Physical Design Engineer
4 salaries
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₹5 L/yr - ₹12 L/yr

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4 salaries
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₹2.5 L/yr - ₹3.6 L/yr

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3 salaries
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₹4 L/yr - ₹4.8 L/yr

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