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Micron Technology
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I applied via Referral and was interviewed before Apr 2023. There were 3 interview rounds.
What people are saying about Micron Technology
posted on 29 Aug 2024
UVM (Universal Verification Methodology) basic principle is to provide a standardized methodology for verifying digital designs.
UVM is based on SystemVerilog and provides a framework for creating reusable verification environments
It promotes the use of object-oriented programming techniques for creating modular and scalable testbenches
UVM encourages the use of constrained-random stimulus generation and coverage-driven ...
posted on 29 Feb 2024
I applied via Campus Placement and was interviewed in Jan 2024. There was 1 interview round.
posted on 5 Apr 2024
I applied via Referral and was interviewed in Aug 2021. There was 1 interview round.
posted on 29 Nov 2024
Toggle the bits of given input
Create a mask with all bits set to 1
XOR the input with the mask to toggle the bits
Repeat the process for each bit position
Print a star pattern using loops
Use nested loops to print the desired pattern
Increment the number of stars in each row to create the pattern
Example: for a pattern with 5 rows - * , ** , *** , **** , *****
posted on 10 Jul 2024
Yes, setup and hold uncertainty values are different in physical design engineering.
Setup uncertainty is related to the arrival time of the data signal at the input of the flip-flop, while hold uncertainty is related to the removal time of the data signal.
Setup time is the minimum amount of time the data input must be stable before the clock edge, while hold time is the minimum amount of time the data input must be sta...
posted on 29 Aug 2024
UVM (Universal Verification Methodology) basic principle is to provide a standardized methodology for verifying digital designs.
UVM is based on SystemVerilog and provides a framework for creating reusable verification environments
It promotes the use of object-oriented programming techniques for creating modular and scalable testbenches
UVM encourages the use of constrained-random stimulus generation and coverage-driven ...
posted on 10 Feb 2024
I applied via Campus Placement and was interviewed in Jan 2024. There were 2 interview rounds.
Mcq questions based on aptitude(a bit ) and digital design, VLSI, Clock related questions
based on 1 interview
Interview experience
based on 2 reviews
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Software Engineer
128
salaries
| ₹6 L/yr - ₹20 L/yr |
Senior Software Engineer
113
salaries
| ₹11.5 L/yr - ₹26 L/yr |
Data Engineer
83
salaries
| ₹7.4 L/yr - ₹28.1 L/yr |
Staff Engineer
70
salaries
| ₹24 L/yr - ₹50 L/yr |
Senior Engineer
57
salaries
| ₹14 L/yr - ₹40.5 L/yr |
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