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MediaTek India Technology Physical Design Engineer Interview Questions and Answers

Updated 10 Jul 2024

MediaTek India Technology Physical Design Engineer Interview Experiences

1 interview found

Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - One-on-one 

(1 Question)

  • Q1. Is setup and hold uncertainty values are different
  • Ans. 

    Yes, setup and hold uncertainty values are different in physical design engineering.

    • Setup uncertainty is related to the arrival time of the data signal at the input of the flip-flop, while hold uncertainty is related to the removal time of the data signal.

    • Setup time is the minimum amount of time the data input must be stable before the clock edge, while hold time is the minimum amount of time the data input must be sta...

  • Answered by AI

Interview questions from similar companies

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Aug 2024. There were 3 interview rounds.

Round 1 - Aptitude Test 

Aotitude,core que on all subjects in ece

Round 2 - Technical 

(2 Questions)

  • Q1. INTERNSHIP EXPERIENCE
  • Ans. 

    I completed a 6-month internship at XYZ Company where I gained hands-on experience in physical design tools and methodologies.

    • Worked on floorplanning, placement, and routing of digital designs

    • Utilized tools such as Cadence Innovus and Synopsys ICC

    • Collaborated with cross-functional teams to optimize design performance

  • Answered by AI
  • Q2. ON DSD,VLSI,ANALOG ELECTRONICS
Round 3 - HR 

(2 Questions)

  • Q1. APTITUDE,MATH,VLSI,DSD
  • Q2. VLSI (HARD QUESTION BASED ON INDUSTRY LEVEL LIKE ON CIRCUIT HE GIVES ONE SCENARIO U HAVE TO ANSWER IT)

Interview Preparation Tips

Interview preparation tips for other job seekers - LEARN BASICS WELL
Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. What is cross talk
  • Ans. 

    Cross talk is the unwanted transfer of signals between different components or traces on a circuit board.

    • Occurs when signals from one trace interfere with signals on another trace

    • Can lead to signal distortion or errors in data transmission

    • Prevented by proper spacing and shielding between traces

    • Example: Cross talk between data lines on a PCB causing errors in communication

  • Answered by AI
  • Q2. How to define generated clocks through edges
  • Ans. 

    Generated clocks through edges are defined by specifying the source clock and the edge on which the generated clock is based.

    • Specify the source clock for the generated clock

    • Define the edge (rising/falling) on which the generated clock is based

    • Use tools like Synopsys Design Compiler to define generated clocks

  • Answered by AI

I applied via Referral and was interviewed before Nov 2021. There were 2 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(2 Questions)

  • Q1. Interview based on EMIR ànalysis 1. Static and Dynamic Ir drop questions
  • Q2. Power and signal EM questions

Interview Preparation Tips

Interview preparation tips for other job seekers - Good to work here and give good training for freshers and lot of clients are there
Interview experience
3
Average
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. Toggle the bits of given input
  • Ans. 

    Toggle the bits of given input

    • Create a mask with all bits set to 1

    • XOR the input with the mask to toggle the bits

    • Repeat the process for each bit position

  • Answered by AI
  • Q2. Clear the set bit
Round 2 - Technical 

(2 Questions)

  • Q1. Print the star pattern
  • Ans. 

    Print a star pattern using loops

    • Use nested loops to print the desired pattern

    • Increment the number of stars in each row to create the pattern

    • Example: for a pattern with 5 rows - * , ** , *** , **** , *****

  • Answered by AI
  • Q2. Microprocessor microcontroller topics are asked

Skills evaluated in this interview

Interview experience
3
Average
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Jan 2024. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. Basics of analog , digital and vlsi
  • Q2. On face to face interview, they asked me abt my projects , digital, little analog , vlsi ( verilog), microcontrollers and c programming

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare well on your basics
Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via LinkedIn and was interviewed in Oct 2023. There were 2 interview rounds.

Round 1 - Aptitude Test 

40 aptitude qns and some mcqs on basic programming

Round 2 - Technical 

(4 Questions)

  • Q1. I was asked to write two sum, palindrome function and merge sort code in whatever language I'm comfortable in
  • Q2. Two sum- return true or false
  • Ans. 

    Given an array of integers, determine if there are two numbers that add up to a specific target.

    • Iterate through the array and store each element in a hash set.

    • For each element, check if the difference between the target and the element exists in the hash set.

    • If the difference exists, return true; otherwise, continue iterating.

    • Example: nums = [2, 7, 11, 15], target = 9. The function should return true as 2 + 7 = 9.

  • Answered by AI
  • Q3. Merge sort function code
  • Q4. Palindromic string or not

Skills evaluated in this interview

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
4-6 weeks
Result
Selected Selected

I applied via Referral and was interviewed before Apr 2023. There were 3 interview rounds.

Round 1 - One-on-one 

(1 Question)

  • Q1. Asked the working experience and the related skills to the new job
Round 2 - Technical 

(1 Question)

  • Q1. Coding questions in Verilog, Systemverilog, random constraints such as how to write a onehot in different ways
Round 3 - HR 

(1 Question)

  • Q1. Asked the expectation of the base salary and overall compensation

Interview Preparation Tips

Topics to prepare for Micron Technology Verification Engineer interview:
  • SystemVerilog coding
Interview experience
3
Average
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Referral and was interviewed before Jan 2022. There were 3 interview rounds.

Round 1 - Coding Test 

Mostly on TB components coding, different scenario coding..

Round 2 - Coding Test 

Mostly on past project experience, different implementation on those projects.

Round 3 - HR 

(2 Questions)

  • Q1. On background details
  • Q2. Reason of job change
  • Ans. 

    Seeking new challenges and growth opportunities in the field of verification engineering.

    • Desire to work on more complex projects

    • Opportunity to learn and apply new technologies

    • Seeking a more collaborative and supportive work environment

    • Career advancement and professional development

    • Company restructuring or downsizing

    • Relocation or commute concerns

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - Focus on the verification concepts and past projects.
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(1 Question)

  • Q1. Sdc basics TCL coding

MediaTek India Technology Interview FAQs

How many rounds are there in MediaTek India Technology Physical Design Engineer interview?
MediaTek India Technology interview process usually has 1 rounds. The most common rounds in the MediaTek India Technology interview process are One-on-one Round.

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MediaTek India Technology Physical Design Engineer Salary
based on 23 salaries
₹9 L/yr - ₹16.6 L/yr
15% more than the average Physical Design Engineer Salary in India
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