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I applied via Campus Placement
Aptitude and Digital Electronics questions.
Time and work, series and speed quantitative aptitude
Synchronous counters use clock signal to change state while asynchronous counters use external inputs.
Synchronous counters change state on every clock pulse
Asynchronous counters change state based on external inputs
Synchronous counters are faster and more reliable
Asynchronous counters are simpler and cheaper
Example of synchronous counter: Johnson counter
Example of asynchronous counter: Ripple counter
I applied via Campus Placement and was interviewed before Aug 2022. There were 4 interview rounds.
Time and speed, distance, permutation and combinations, clocks, calendars
Digital electonics topics(boolean expression using seq/combo logic), meere&mooley machine, state diagrams, counters using flipflops
I applied via Newspaper Ad and was interviewed before Apr 2022. There were 4 interview rounds.
Aptitude test had been conducted with basic knowledge and digital design questions had been conducted related to job.
Physical design flow involves converting a logical design into a physical layout.
The process starts with floorplanning and power planning
Placement and routing are done to create a physical layout
Timing analysis and optimization are performed to meet timing constraints
Design rule check (DRC) and layout versus schematic (LVS) checks are done to ensure correctness
Finally, the layout is verified through signoff checks befo
Cerium Systems interview questions for popular designations
I applied via Job Portal and was interviewed before Apr 2022. There were 2 interview rounds.
Implement 2 stage XOR gate using 2 stage NAND gate.
Construct 2 stage NAND gate using 4 NAND gates.
Connect the output of first stage NAND gate to the input of second stage NAND gate.
Connect the output of second stage NAND gate to the input of first stage NAND gate.
The output of second stage NAND gate is the output of the XOR gate.
Implementing dff using 2:1 mux
Connect the input to the select line of the mux
Connect the output of the mux to one of the inputs of the mux
Connect the output of the dff to the other input of the mux
Connect the output of the mux to the input of the dff
I applied via LinkedIn and was interviewed before Jun 2022. There were 4 interview rounds.
There are mcqs questions will be in exam on Aptitude, C language, Digital Electronics. Those are like GATE Level questions.
Top trending discussions
posted on 4 Jul 2022
I applied via Campus Placement and was interviewed before Jul 2021. There were 2 interview rounds.
Standard Aptitude topics, 30 mins - 30 questions
I applied via Campus Placement and was interviewed in Sep 2021. There were 2 interview rounds.
2 coding questions and around 20 aptitude questions
It was not good, it contain mostly question of java programming.
Factorial of n and sum of n numbers using recursion
Create a recursive function to calculate factorial of n
Use a recursive function to calculate the sum of all n numbers
Handle base cases for both factorial and sum calculations
Example: Factorial of 5 = 5 * 4 * 3 * 2 * 1 = 120, Sum of first 5 numbers = 1 + 2 + 3 + 4 + 5 = 15
I applied via Campus Placement and was interviewed before Sep 2023. There were 3 interview rounds.
The first round was a mcq test based on aptitude and statstics
2nd round was a coding round. Three questions were given . Two were easy and one was medium
The duration of Cerium Systems interview process can vary, but typically it takes about 2-4 weeks to complete.
based on 6 interviews
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