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I applied via Campus Placement and was interviewed in Aug 2024. There were 2 interview rounds.
Write a basic verilog for basic gates??
I am a passionate and dedicated Design & Verification Engineer with a strong background in digital design and verification methodologies.
I have a Bachelor's degree in Electrical Engineering
I have experience with RTL design and verification using Verilog and SystemVerilog
I am proficient in using simulation tools such as ModelSim and QuestaSim
I have worked on projects involving FPGA and ASIC design
The company is a leading provider of design and verification solutions for semiconductor companies.
Specializes in providing design and verification solutions for semiconductor companies
Offers a range of tools and services for efficient chip design and verification
Known for innovative technologies and cutting-edge solutions
Has a strong reputation in the industry for quality and reliability
Works with top semiconductor co
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I applied via Naukri.com and was interviewed in Aug 2022. There were 2 interview rounds.
30 mins - Coding, 15mins each - 3 MCQ rounds
based on 1 interview
Interview experience
based on 17 reviews
Rating in categories
Associate Engineer
185
salaries
| ₹3 L/yr - ₹6 L/yr |
Physical Design Engineer
128
salaries
| ₹3 L/yr - ₹10.1 L/yr |
Design & Verification Engineer
83
salaries
| ₹3.1 L/yr - ₹11 L/yr |
Senior Engineer
61
salaries
| ₹8.3 L/yr - ₹31 L/yr |
Engineer
50
salaries
| ₹4.4 L/yr - ₹15 L/yr |
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