Atria Logic Asic Design Verification Engineer Interview Questions and Answers

A multiplexer (mux) is a digital circuit that selects one of several input signals and forwards it to a single output. A flip-flop (ff) is a type of latch circuit that stores a single bit of data.

• Mux design involves selecting one of multiple input signals based on a control signal

• FF design involves storing a single bit of data using a clock signal

• Mux can be implemented using logic gates like AND, OR, and NOT gates

• FF ca...read more

Timing violations occur when a signal does not meet the required timing constraints in digital circuits.

• Timing violations can lead to incorrect circuit behavior or functional failures.

• Common types include setup time violations and hold time violations.

• Example: A setup time violation occurs if data arrives too late before the clock edge.

• Hold time violations happen when data changes too soon after the clock edge.

• Static T...read more

UVM (Universal Verification Methodology) basic principle is to provide a standardized methodology for verifying digital designs.

• UVM is based on SystemVerilog and provides a framework for creating reusable verification environments

• It promotes the use of object-oriented programming techniques for creating modular and scalable testbenches

• UVM encourages the use of constrained-random stimulus generation and coverage-driven ...read more

CMOS inverter transfer characteristics illustrate the relationship between input and output voltages, affected by various parameters.

• Vth (threshold voltage) affects the switching point; higher Vth shifts the curve right.

• W/L ratio (width-to-length) influences drive strength; larger W/L increases output current.

• Supply voltage (Vdd) impacts the output swing; higher Vdd results in a larger output voltage range.

• Temperature ...read more