Texas Instruments Asic Design Verification Engineer Interview Questions and Answers

Cross talk is the unwanted transfer of signals between different components or traces on a circuit board.

• Occurs when signals from one trace interfere with signals on another trace

• Can lead to signal distortion or errors in data transmission

• Prevented by proper spacing and shielding between traces

• Example: Cross talk between data lines on a PCB causing errors in communication

Generated clocks through edges are defined by specifying the source clock and the edge on which the generated clock is based.

• Specify the source clock for the generated clock

• Define the edge (rising/falling) on which the generated clock is based

• Use tools like Synopsys Design Compiler to define generated clocks

UVM (Universal Verification Methodology) basic principle is to provide a standardized methodology for verifying digital designs.

• UVM is based on SystemVerilog and provides a framework for creating reusable verification environments

• It promotes the use of object-oriented programming techniques for creating modular and scalable testbenches

• UVM encourages the use of constrained-random stimulus generation and coverage-driven ...read more

Coverage-driven verification techniques are used to ensure all possible state transitions are exercised.

• Coverage metrics like state, transition, and toggle coverage can be used to track the completeness of state transitions.

• Writing directed tests to cover specific state transitions can help achieve higher coverage.

• Random stimulus generation can also be used to explore different state transitions.

• Functional coverage can...read more

Yes, setup and hold uncertainty values are different in physical design engineering.

• Setup uncertainty is related to the arrival time of the data signal at the input of the flip-flop, while hold uncertainty is related to the removal time of the data signal.

• Setup time is the minimum amount of time the data input must be stable before the clock edge, while hold time is the minimum amount of time the data input must be sta...read more

To predict if a 32 bit number is divisible by 8, design a circuit using gates.

• Use a circuit with AND, OR, and NOT gates to check if the last three bits of the number are all zeros.

• If the last three bits are zeros, then the number is divisible by 8.

• For example, if the 32 bit number is 11010000, the last three bits are zeros, so it is divisible by 8.