Senior Design Verification Engineer - UVM/System Verilog (5-6 yrs)

Responsibilities :

- Develop comprehensive verification plans based on design specifications.

- Create and maintain robust UVM-based testbenches.

- Execute verification plans, including test case development, simulation, and debugging.

- Utilize assertions and functional coverage to ensure thorough verification.

- Verify complex Fabric, Network-on-Chip (NOC), and Interconnect blocks.

- Ensure the correct functionality and performance of data flow and communication within the system.

- Verify adherence to industry-standard protocols such as AMBA suite (AXI/ACE), PCIe, CXL, interrupt handling, and power management.

- Develop and execute protocol-specific test cases.

- Analyze functional and code coverage to identify and address verification gaps.

- Drive coverage closure and ensure high-quality verification.

- Collaborate with design and architecture teams to resolve design and verification issues.

- Perform thorough debugging to identify root causes of failures.

- Document verification plans, test cases, and results.

Required Skills & Experience :

- 5+ years of experience in IP or subsystem verification of complex blocks.

- Strong proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM).

- Extensive experience in developing and executing test plans, testbenches, and assertions.

- Proven experience in verifying Fabric/NOC/Interconnect blocks.

- Solid understanding of protocols such as AMBA suite (AXI/ACE), PCIe, CXL, interrupt handling, and power management.

- Experience with coverage-driven verification and coverage closure.

- Strong debugging and problem-solving skills.

- Excellent communication and teamwork skills.

Preferred Skills (Nice to Have) :

- Experience or knowledge of coherent traffic verification.

Candidate Mandates :

- Candidates must provide experience and relieving letters for all employers listed on their resume and UAN history.

- Any discrepancies between the UAN history, experience letters, and resume must be disclosed with a proper justification before the interview process.

- All selected candidates will undergo a mandatory UAN check before an offer is extended.

- Experience will be calculated after the completion of graduation, and candidates must have a clean academic record without backlogs