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Synapse Design Physical Design Engineer Interview Questions and Answers

Updated 7 Apr 2023

Synapse Design Physical Design Engineer Interview Experiences

1 interview found

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Recruitment Consulltant and was interviewed in Mar 2023. There were 3 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Properly align and format text in your resume. A recruiter will have to spend more time reading poorly aligned text, leading to high chances of rejection.
View all tips
Round 2 - Technical 

(2 Questions)

  • Q1. What is an ICG? How would you use it in the design?
  • Ans. 

    ICG stands for Inter-Chip Global. It is a network that connects multiple chips in a system.

    • ICG is used to transfer data between different chips in a system

    • It helps in reducing the number of wires required for communication between chips

    • ICG can be used in various design aspects such as clock distribution, power management, and data transfer

    • Example: In a multi-chip system, ICG can be used to transfer clock signals from o

  • Answered by AI
  • Q2. How will MSCTS help at SOC level CTS
  • Ans. 

    MSCTS can help in achieving better clock distribution and reducing skew at SOC level CTS.

    • MSCTS (Multi-Source Clock Tree Synthesis) can optimize the clock tree for better skew and jitter performance.

    • It can also help in reducing power consumption by optimizing the clock network.

    • MSCTS can handle multiple clock sources and ensure proper synchronization.

    • It can also help in meeting timing constraints and reducing clock tree ...

  • Answered by AI
Round 3 - Technical 

(2 Questions)

  • Q1. What was the most difficult challenge faced in the projects you worked?
  • Q2. How will you fix setup and hold time when both are violating at the same time.
  • Ans. 

    Fixing setup and hold time violations simultaneously requires adjusting clock timing and/or data path delays.

    • Identify the critical path causing the violations

    • Adjust the clock timing to meet setup and hold requirements

    • Adjust the data path delays to meet setup and hold requirements

    • Use tools like static timing analysis and delay calculation to determine necessary adjustments

    • Iteratively adjust timing and delays until viola

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - The interview was professional and technical. They asked all basic STA and PD Flow Questions. It is advisable to go through few topics like Low Power and STA before interview.

Skills evaluated in this interview

Interview questions from similar companies

Interview experience
3
Average
Difficulty level
Hard
Process Duration
Less than 2 weeks
Result
No response

I applied via Recruitment Consulltant and was interviewed in Sep 2023. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. Temperature of the design you worked for?
  • Ans. 

    The temperature of the design I worked on was optimized to ensure proper functionality and reliability.

    • The temperature was carefully controlled to prevent overheating and ensure performance.

    • Thermal analysis was conducted to determine the optimal operating temperature.

    • Cooling solutions such as heat sinks or fans were implemented to manage heat dissipation.

    • Examples: The design operated within a temperature range of 0-70 ...

  • Answered by AI
  • Q2. Mention the corners you worked in

Interview Preparation Tips

Interview preparation tips for other job seekers - go from basics

Skills evaluated in this interview

I applied via Referral and was interviewed before Nov 2021. There were 2 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(2 Questions)

  • Q1. Interview based on EMIR ànalysis 1. Static and Dynamic Ir drop questions
  • Q2. Power and signal EM questions

Interview Preparation Tips

Interview preparation tips for other job seekers - Good to work here and give good training for freshers and lot of clients are there
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(1 Question)

  • Q1. Sdc basics TCL coding
Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Aug 2024. There were 3 interview rounds.

Round 1 - Aptitude Test 

Aotitude,core que on all subjects in ece

Round 2 - Technical 

(2 Questions)

  • Q1. INTERNSHIP EXPERIENCE
  • Ans. 

    I completed a 6-month internship at XYZ Company where I gained hands-on experience in physical design tools and methodologies.

    • Worked on floorplanning, placement, and routing of digital designs

    • Utilized tools such as Cadence Innovus and Synopsys ICC

    • Collaborated with cross-functional teams to optimize design performance

  • Answered by AI
  • Q2. ON DSD,VLSI,ANALOG ELECTRONICS
Round 3 - HR 

(2 Questions)

  • Q1. APTITUDE,MATH,VLSI,DSD
  • Q2. VLSI (HARD QUESTION BASED ON INDUSTRY LEVEL LIKE ON CIRCUIT HE GIVES ONE SCENARIO U HAVE TO ANSWER IT)

Interview Preparation Tips

Interview preparation tips for other job seekers - LEARN BASICS WELL
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(1 Question)

  • Q1. Congestion analysis
Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. What is cross talk
  • Ans. 

    Cross talk is the unwanted transfer of signals between different components or traces on a circuit board.

    • Occurs when signals from one trace interfere with signals on another trace

    • Can lead to signal distortion or errors in data transmission

    • Prevented by proper spacing and shielding between traces

    • Example: Cross talk between data lines on a PCB causing errors in communication

  • Answered by AI
  • Q2. How to define generated clocks through edges
  • Ans. 

    Generated clocks through edges are defined by specifying the source clock and the edge on which the generated clock is based.

    • Specify the source clock for the generated clock

    • Define the edge (rising/falling) on which the generated clock is based

    • Use tools like Synopsys Design Compiler to define generated clocks

  • Answered by AI

I applied via Campus Placement and was interviewed before Jan 2021. There were 3 interview rounds.

Round 1 - Technical 

(1 Question)

  • Q1. What is a cache? What does tag used for in a cache?
  • Ans. 

    A cache is a high-speed data storage layer that stores frequently accessed data to reduce access time. A tag is used to identify the location of data in the cache.

    • Cache is a temporary storage that holds frequently accessed data

    • It reduces the access time by providing faster access to data

    • Tag is used to identify the location of data in the cache

    • Tag is a part of the cache memory address

    • Cache can be implemented in hardware...

  • Answered by AI
Round 2 - Coding Test 

C Coding questions

Round 3 - HR 

(3 Questions)

  • Q1. What is your family background?
  • Q2. What are your strengths and weaknesses?
  • Q3. Tell me about yourself.

Interview Preparation Tips

Interview preparation tips for other job seekers - Revise Computer Architecture and Verilog for interview process

Skills evaluated in this interview

Interview Preparation Tips

Round: Test
Experience: Questions were from digital Electronics which included realization of counters using JK FF,Sequence detector,Boolean expression reduction,One shot and drawing waveforms of some digital circuits.Questions were also their from pipelinig,finding out MIPS,power consumption of two processors,Small signal analysis of MOSFETs,Buffer using CMOS ,finding out the type of filter given block diagram(control theory).Questions were easy and required step by step realization.
Tips: Prepare digital Electronics very well as it has 50% weightage in paper. Pipelinig is important. Some basics concepts of CMOS is very necessary.
Duration: 1hr 15 min minute
Total Questions: 12

Round: Technical Interview
Experience: First they asked to introduce yourself.
Then they asked about projects & Internship.
STA,EEPROM,EPROM,DRAM,SRAM,CACHE Memory,Pipelining,DMA was asked in depth.
Difference between clock skew and Jitter.
Asked whether I know any Hardware Languages.
XOR gate using 2:1 MUX.
Gave a waveform,had to realize using DFF and considering the delay.
Tips: Study STA very well.
Questions will be asked in depth from any topic.

Round: HR Interview
Experience: Family Background
Why NXP
Hobbies


Skill Tips: Study Digital Electronics very well
Skills: Analog Electronics, Microprocessor, Vlsi Basics, Digital Circuits
College Name: BIT Mesra

Interview Preparation Tips

Round: Test
Experience: Questions were from Digital Electronics,Microprocessors and some from CMOS.
50% Digital Electronics.
1 X Output waveform drawing from circuit of FFs & gates
1 X Realize inverter from given two blocks
1 X CMOS implementation of gates
1 X Realize digital circuit for given waveform
1 X MIPS & Pipelining
1 X Processors power Dissipation calculation
1 X Small Signal analysis of CMOS
1 X Compare two given buffers circuits(CMOS)
1 X Transfer function calculation(Control Theory)
1 X Counter using JK FF
1 X Sequence Detector

Tips: Study digital electronics very well.

Duration: 1 hr 45 min minute
Total Questions: 12

Round: Technical Interview
Experience: Indroduction
Projects & Internship
Discussions in DEPTH on:
Pipelining
STA
MIPS
Memory(flash memory,DRAM,SRAM)
CACHE Memory
DMA
Digital circuit realization for given waveform
XOR Gate using 2:1 MUX
Tips: Prepare Digital electronics and Microprocessors very well.Sta is very important.Panel will go deep into the topics to check ur technical knowledge.
TIPS: Be confident and your opinion should be strong.Stand by what you say.Do not get confused.And when panel asks to solve any digital circuits, speak loud what is in your mind and what approach you are using.Be honest.

Round: HR Interview
Experience: Family Background
Why Freescale


Skills: Static Timing Analysis (STA), Memory, CMOS Circuits, Microprocessor, Digital Circuits
College Name: BIT Mesra
Motivation: I had interest in core electronics

Synapse Design Interview FAQs

How many rounds are there in Synapse Design Physical Design Engineer interview?
Synapse Design interview process usually has 3 rounds. The most common rounds in the Synapse Design interview process are Technical and Resume Shortlist.
How to prepare for Synapse Design Physical Design Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Synapse Design. The most common topics and skills that interviewers at Synapse Design expect are Physical Design, PNR, Floor Planning, STA and Primetime.
What are the top questions asked in Synapse Design Physical Design Engineer interview?

Some of the top questions asked at the Synapse Design Physical Design Engineer interview -

  1. What is an ICG? How would you use it in the desi...read more
  2. How will you fix setup and hold time when both are violating at the same ti...read more
  3. How will MSCTS help at SOC level ...read more

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Synapse Design Physical Design Engineer Interview Process

based on 1 interview

Interview experience

5
  
Excellent
View more
Synapse Design Physical Design Engineer Salary
based on 48 salaries
₹4 L/yr - ₹15.1 L/yr
6% more than the average Physical Design Engineer Salary in India
View more details

Synapse Design Physical Design Engineer Reviews and Ratings

based on 7 reviews

1.8/5

Rating in categories

1.8

Skill development

2.0

Work-life balance

2.1

Salary

1.6

Job security

1.8

Company culture

1.9

Promotions

1.6

Work satisfaction

Explore 7 Reviews and Ratings
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