Synapse Design Dft Design Engineer Interview Questions and Answers

Easy questions were there in round 10 . . . . . . .

Q1. Easy questions. . . . . . . . .
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Q2. Everything from fundamentals.....
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Q1. As infineon is Produc based company and Every Person Responsible for complete Chip Testing instead on 1 specific Block. so Interview Asked Basic Tests like continuity, DPS short , Vil/Vih , Voh/Vih , Lekag...read more
Ans. Above all the Topics prepare clearly
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Q2. Basics of Tester Hardwares and why you join in INFIN ? Why want to Change the company ? Why should we we hire ? Tell me about any challenges faced in previous organisation and Work status ? Any protocol...read more
Ans. These are Main topics you should good before going to attend the interview
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Q1. Same as Previous Round but did by Manager in deep level on Basics and work
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Q1. General Discussion about Works did in previous organisation and Basics
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Q1. General Discussion and Salary Negotiation
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Q1. 1st round with hiring manager.Discussion with hiring manager. Reason for switch. Then technical questions on how to debug and find failure flops in a chain. Basic loc,los, loes lock-up latch questions. Why...read more
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Q2. 3 2 hour interviews were taken( Total 6 hours with 1 people in each round). Questions: how we can reduce test time. how serial chain patterns are solved. How T24 violations are debugged, how we can find wh...read more
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Q3. How compression ratio can be tweaked, what are the factors ( how coverage, Patten count gets impacted).
Ans. 
Compression ratio can be tweaked by adjusting the volume of the combustion chamber. This affects fuel efficiency and power output.
• Compression ratio is the ratio of the volume of the combustion chamber at its largest to its smallest.

• Increasing compression ratio can improve fuel efficiency and power output, but too high a ratio can cause engine knocking.

• Factors that impact compression ratio include the size and shape of ...read more
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Q4. How have I observed hold violations and setup violations in my design. What I did after that, etc
Ans. 
I have observed hold and setup violations in my design and took necessary actions.
• I used static timing analysis (STA) to identify hold and setup violations.

• I fixed hold violations by adding delay cells or increasing clock period.

• I fixed setup violations by reducing delay or decreasing clock period.

• I also checked for false paths and multi-cycle paths.

• I re-ran STA after fixing violations to ensure timing closure.

• I docume...read more
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Q5. Purpose of occ controllers. What scan enable signals( pipelined or nonpiplelined) will go to my occ controller, clock chain and why. Lock up latch purpose. If I have 5 negative edge triggered flops and 5 p...read more
Ans. 
Explanation of purpose of occ controllers, scan enable signals, lock up latch and arrangement of negative and positive edge triggered flops.
• The purpose of occ controllers is to manage the clock signals in a design and ensure proper timing.

• Scan enable signals are used for testing and debugging purposes.

• Pipelined signals are used for faster data transfer while non-pipelined signals are used for simpler designs.

• Lock up la...read more
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Q6. How can we reset a tap controller without trst signals. How do you find coverage gaps.
Ans. 
Resetting a tap controller without trst signals and finding coverage gaps.
• For resetting a tap controller without trst signals, we can use a power-on reset circuit or a watchdog timer.

• To find coverage gaps, we can use code coverage analysis tools like CodeSonar, Coverity, or LDRA.

• We can also use dynamic analysis tools like Valgrind or Purify to find runtime errors and coverage gaps.

• Manual testing and peer code reviews c...read more
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Q1. They asked about technical
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Q2. Provide answers for the same
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Q1. They asked about technical
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Q2. Answers according to question
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