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Synapse Design Physical Design Engineer Interview Questions and Answers

Updated 7 Apr 2023

Synapse Design Physical Design Engineer Interview Experiences

1 interview found

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Recruitment Consulltant and was interviewed in Mar 2023. There were 3 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(2 Questions)

  • Q1. What is an ICG? How would you use it in the design?
  • Ans. 

    ICG stands for Inter-Chip Global. It is a network that connects multiple chips in a system.

    • ICG is used to transfer data between different chips in a system

    • It helps in reducing the number of wires required for communication between chips

    • ICG can be used in various design aspects such as clock distribution, power management, and data transfer

    • Example: In a multi-chip system, ICG can be used to transfer clock signals from o

  • Answered by AI
  • Q2. How will MSCTS help at SOC level CTS
  • Ans. 

    MSCTS can help in achieving better clock distribution and reducing skew at SOC level CTS.

    • MSCTS (Multi-Source Clock Tree Synthesis) can optimize the clock tree for better skew and jitter performance.

    • It can also help in reducing power consumption by optimizing the clock network.

    • MSCTS can handle multiple clock sources and ensure proper synchronization.

    • It can also help in meeting timing constraints and reducing clock tree ...

  • Answered by AI
Round 3 - Technical 

(2 Questions)

  • Q1. What was the most difficult challenge faced in the projects you worked?
  • Q2. How will you fix setup and hold time when both are violating at the same time.
  • Ans. 

    Fixing setup and hold time violations simultaneously requires adjusting clock timing and/or data path delays.

    • Identify the critical path causing the violations

    • Adjust the clock timing to meet setup and hold requirements

    • Adjust the data path delays to meet setup and hold requirements

    • Use tools like static timing analysis and delay calculation to determine necessary adjustments

    • Iteratively adjust timing and delays until viola

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - The interview was professional and technical. They asked all basic STA and PD Flow Questions. It is advisable to go through few topics like Low Power and STA before interview.

Skills evaluated in this interview

Interview questions from similar companies

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Aug 2024. There were 3 interview rounds.

Round 1 - Aptitude Test 

Aotitude,core que on all subjects in ece

Round 2 - Technical 

(2 Questions)

  • Q1. INTERNSHIP EXPERIENCE
  • Ans. 

    I completed a 6-month internship at XYZ Company where I gained hands-on experience in physical design tools and methodologies.

    • Worked on floorplanning, placement, and routing of digital designs

    • Utilized tools such as Cadence Innovus and Synopsys ICC

    • Collaborated with cross-functional teams to optimize design performance

  • Answered by AI
  • Q2. ON DSD,VLSI,ANALOG ELECTRONICS
Round 3 - HR 

(2 Questions)

  • Q1. APTITUDE,MATH,VLSI,DSD
  • Q2. VLSI (HARD QUESTION BASED ON INDUSTRY LEVEL LIKE ON CIRCUIT HE GIVES ONE SCENARIO U HAVE TO ANSWER IT)

Interview Preparation Tips

Interview preparation tips for other job seekers - LEARN BASICS WELL
Interview experience
3
Average
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. Toggle the bits of given input
  • Ans. 

    Toggle the bits of given input

    • Create a mask with all bits set to 1

    • XOR the input with the mask to toggle the bits

    • Repeat the process for each bit position

  • Answered by AI
  • Q2. Clear the set bit
Round 2 - Technical 

(2 Questions)

  • Q1. Print the star pattern
  • Ans. 

    Print a star pattern using loops

    • Use nested loops to print the desired pattern

    • Increment the number of stars in each row to create the pattern

    • Example: for a pattern with 5 rows - * , ** , *** , **** , *****

  • Answered by AI
  • Q2. Microprocessor microcontroller topics are asked

Skills evaluated in this interview

Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(1 Question)

  • Q1. They asked from Digital, COA
Round 2 - Technical 

(1 Question)

  • Q1. They asked the concepts of COA
Round 3 - HR 

(1 Question)

  • Q1. First started with Puzzle and then about company
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
-
Result
-

I applied via Referral and was interviewed in Apr 2024. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. Simple FSM given similar to mux and asked for testcases and assertions.
  • Q2. Coverage to write transitions of states.
  • Ans. 

    Coverage-driven verification techniques are used to ensure all possible state transitions are exercised.

    • Coverage metrics like state, transition, and toggle coverage can be used to track the completeness of state transitions.

    • Writing directed tests to cover specific state transitions can help achieve higher coverage.

    • Random stimulus generation can also be used to explore different state transitions.

    • Functional coverage can...

  • Answered by AI
Interview experience
3
Average
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Jan 2024. There was 1 interview round.

Round 1 - Technical 

(2 Questions)

  • Q1. Basics of analog , digital and vlsi
  • Q2. On face to face interview, they asked me abt my projects , digital, little analog , vlsi ( verilog), microcontrollers and c programming

Interview Preparation Tips

Interview preparation tips for other job seekers - Prepare well on your basics
Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via LinkedIn and was interviewed in Oct 2023. There were 2 interview rounds.

Round 1 - Aptitude Test 

40 aptitude qns and some mcqs on basic programming

Round 2 - Technical 

(4 Questions)

  • Q1. I was asked to write two sum, palindrome function and merge sort code in whatever language I'm comfortable in
  • Q2. Two sum- return true or false
  • Ans. 

    Given an array of integers, determine if there are two numbers that add up to a specific target.

    • Iterate through the array and store each element in a hash set.

    • For each element, check if the difference between the target and the element exists in the hash set.

    • If the difference exists, return true; otherwise, continue iterating.

    • Example: nums = [2, 7, 11, 15], target = 9. The function should return true as 2 + 7 = 9.

  • Answered by AI
  • Q3. Merge sort function code
  • Q4. Palindromic string or not

Skills evaluated in this interview

Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(1 Question)

  • Q1. Sdc basics TCL coding
Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via campus placement at Sardar Vallabhbhai National Institute of Technology (NIT), Surat and was interviewed before Jan 2023. There were 2 interview rounds.

Round 1 - Technical 

(2 Questions)

  • Q1. Write a program for an ATM machine to get minimum no. of notes.
  • Ans. 

    Program to calculate minimum number of notes for ATM withdrawal

    • Create an array of available note denominations

    • Sort the array in descending order

    • Initialize a counter variable to keep track of the number of notes

    • Iterate through the array and divide the withdrawal amount by each note denomination

    • Update the counter variable with the quotient

    • Update the withdrawal amount with the remainder

    • Repeat the above steps until the wit...

  • Answered by AI
  • Q2. Can we pass an array to function.
  • Ans. 

    Yes, an array can be passed to a function in embedded firmware programming.

    • Arrays can be passed to functions by specifying the array name as the argument.

    • The function can then access and manipulate the elements of the array.

    • Example: void printArray(int arr[], int size) { ... }

    • Example: int main() { int myArray[] = {1, 2, 3}; printArray(myArray, 3); }

  • Answered by AI
Round 2 - HR 

(1 Question)

  • Q1. What are your salary expectations

Skills evaluated in this interview

I applied via LinkedIn and was interviewed in May 2022. There were 2 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(2 Questions)

  • Q1. Prepare for c programming and verilog for system level verification
  • Q2. Explain the architecture of SoC and its components. How is transaction done at SoC level
  • Ans. 

    SoC architecture consists of multiple components like CPU, memory, peripherals, and interconnects. Transactions are done through buses.

    • SoC architecture includes a CPU, memory, peripherals, and interconnects

    • Interconnects are used to connect the components and enable communication

    • Transactions are done through buses like AXI, AHB, or APB

    • The components can be customized based on the application requirements

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - Good understanding of verilog and c programming required

Skills evaluated in this interview

Synapse Design Interview FAQs

How many rounds are there in Synapse Design Physical Design Engineer interview?
Synapse Design interview process usually has 3 rounds. The most common rounds in the Synapse Design interview process are Technical and Resume Shortlist.
How to prepare for Synapse Design Physical Design Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Synapse Design. The most common topics and skills that interviewers at Synapse Design expect are Physical Design, PNR, Floor Planning, STA and Primetime.
What are the top questions asked in Synapse Design Physical Design Engineer interview?

Some of the top questions asked at the Synapse Design Physical Design Engineer interview -

  1. What is an ICG? How would you use it in the desi...read more
  2. How will you fix setup and hold time when both are violating at the same ti...read more
  3. How will MSCTS help at SOC level ...read more

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Synapse Design Physical Design Engineer Salary
based on 52 salaries
₹4.1 L/yr - ₹16.1 L/yr
17% more than the average Physical Design Engineer Salary in India
View more details

Synapse Design Physical Design Engineer Reviews and Ratings

based on 7 reviews

1.8/5

Rating in categories

1.8

Skill development

2.1

Work-Life balance

2.1

Salary & Benefits

1.6

Job Security

1.8

Company culture

1.9

Promotions/Appraisal

1.6

Work Satisfaction

Explore 7 Reviews and Ratings
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