Samsung Semiconductor Dft Design Engineer Interview Questions and Answers

Q1. 1st round with hiring manager.Discussion with hiring manager. Reason for switch. Then technical questions on how to debug and find failure flops in a chain. Basic loc,los, loes lock-up latch questions. Why...read more
Add your answer
Q2. 3 2 hour interviews were taken( Total 6 hours with 1 people in each round). Questions: how we can reduce test time. how serial chain patterns are solved. How T24 violations are debugged, how we can find wh...read more
Add your answer
Q3. How compression ratio can be tweaked, what are the factors ( how coverage, Patten count gets impacted).
Ans. 
Compression ratio can be tweaked by adjusting the volume of the combustion chamber. This affects fuel efficiency and power output.
• Compression ratio is the ratio of the volume of the combustion chamber at its largest to its smallest.

• Increasing compression ratio can improve fuel efficiency and power output, but too high a ratio can cause engine knocking.

• Factors that impact compression ratio include the size and shape of ...read more
Answered by AI
Add your answer
Q4. How have I observed hold violations and setup violations in my design. What I did after that, etc
Ans. 
I have observed hold and setup violations in my design and took necessary actions.
• I used static timing analysis (STA) to identify hold and setup violations.

• I fixed hold violations by adding delay cells or increasing clock period.

• I fixed setup violations by reducing delay or decreasing clock period.

• I also checked for false paths and multi-cycle paths.

• I re-ran STA after fixing violations to ensure timing closure.

• I docume...read more
Answered by AI
Add your answer
Q5. Purpose of occ controllers. What scan enable signals( pipelined or nonpiplelined) will go to my occ controller, clock chain and why. Lock up latch purpose. If I have 5 negative edge triggered flops and 5 p...read more
Ans. 
Explanation of purpose of occ controllers, scan enable signals, lock up latch and arrangement of negative and positive edge triggered flops.
• The purpose of occ controllers is to manage the clock signals in a design and ensure proper timing.

• Scan enable signals are used for testing and debugging purposes.

• Pipelined signals are used for faster data transfer while non-pipelined signals are used for simpler designs.

• Lock up la...read more
Answered by AI
Add your answer
Q6. How can we reset a tap controller without trst signals. How do you find coverage gaps.
Ans. 
Resetting a tap controller without trst signals and finding coverage gaps.
• For resetting a tap controller without trst signals, we can use a power-on reset circuit or a watchdog timer.

• To find coverage gaps, we can use code coverage analysis tools like CodeSonar, Coverity, or LDRA.

• We can also use dynamic analysis tools like Valgrind or Purify to find runtime errors and coverage gaps.

• Manual testing and peer code reviews c...read more
Answered by AI
Add your answer

Q1. Good interview round
Add your answer
Q2. Full technical questions
Add your answer
Q3. What is dft basic
Ans. 
DFT (Design for Testability) is a method used in electronics design to ensure that the product can be easily tested during manufacturing.
• DFT involves designing the product in a way that makes it easy to test for faults or defects.

• Techniques used in DFT include adding test points, scan chains, and built-in self-test features.

• DFT helps reduce the time and cost of testing during manufacturing.

• Example: Adding scan chains t...read more
Answered by AI
Add your answer
Q4. Write the verilog code
Ans. 
Verilog code for Dft Design Engineer
• Use Verilog syntax to describe digital circuits

• Include modules, inputs, outputs, and logic gates in the code

• Ensure proper indentation and formatting for readability
Answered by AI
Add your answer
Q5. Atpg, scan and simulation questions
Add your answer

Q1. First round was with DFT Head. He seemed little arrogant. Asked me basic DFT questions like wrapper architecture, working and how flops will be handled in case of setup and hold.
Add your answer
Q2. He also asked me about work I have done
Add your answer

Q1. This was 3 hours back to back interview. In first round, All questions were on scan architecture, need of lockup latches, ATPG Basics, compression architecture etc. Second round was more on the challenges ...read more
Add your answer

Q1. Introduction about ourselves
Add your answer

Q1. Personal interview ( personality test )
Add your answer

Q1. Tell me about yourself
Add your answer
Q2. Questions based on experience and projects
Add your answer

Q1. Electronic related questions were asked PCB related
Add your answer

Basic aptitude questions

Q1. Tech questions related to domain
Add your answer

Q1. Genenral questions that are non technical
Add your answer

Questions covering various aspects

Q1. Design a mood 3 counter
Ans. 
A mood 3 counter is a device that tracks and displays the user's mood on a scale of 1-3.
• Design a simple interface with 3 buttons for the user to input their mood (happy, neutral, sad)

• Include a display screen to show the current mood level

• Implement a reset button to clear the mood counter

• Consider adding a visual indicator such as colored LEDs for each mood level
Answered by AI
Add your answer
Q2. What are the three states
Ans. 
The three states refer to the three fundamental states of matter: solid, liquid, and gas.
• Solid: particles are closely packed together and have a fixed shape and volume (e.g. ice)

• Liquid: particles are close together but can move past each other, taking the shape of their container (e.g. water)

• Gas: particles are far apart and move freely, filling the entire space of their container (e.g. air)
Answered by AI
Add your answer