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I applied via Recruitment Consulltant and was interviewed before Jun 2023. There was 1 interview round.
DFT (Design for Testability) is a method used in electronics design to ensure that the product can be easily tested during manufacturing.
DFT involves designing the product in a way that makes it easy to test for faults or defects.
Techniques used in DFT include adding test points, scan chains, and built-in self-test features.
DFT helps reduce the time and cost of testing during manufacturing.
Example: Adding scan chains t...
Verilog code for Dft Design Engineer
Use Verilog syntax to describe digital circuits
Include modules, inputs, outputs, and logic gates in the code
Ensure proper indentation and formatting for readability
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posted on 13 Sep 2024
No violations faced
No, I have not faced any violations in my career
I always make sure to adhere to all rules and regulations in my work
I prioritize ethical conduct and compliance with industry standards
I applied via Referral and was interviewed in Jun 2022. There was 1 interview round.
Compression ratio can be tweaked by adjusting the volume of the combustion chamber. This affects fuel efficiency and power output.
Compression ratio is the ratio of the volume of the combustion chamber at its largest to its smallest.
Increasing compression ratio can improve fuel efficiency and power output, but too high a ratio can cause engine knocking.
Factors that impact compression ratio include the size and shape of ...
I have observed hold and setup violations in my design and took necessary actions.
I used static timing analysis (STA) to identify hold and setup violations.
I fixed hold violations by adding delay cells or increasing clock period.
I fixed setup violations by reducing delay or decreasing clock period.
I also checked for false paths and multi-cycle paths.
I re-ran STA after fixing violations to ensure timing closure.
I docume...
Explanation of purpose of occ controllers, scan enable signals, lock up latch and arrangement of negative and positive edge triggered flops.
The purpose of occ controllers is to manage the clock signals in a design and ensure proper timing.
Scan enable signals are used for testing and debugging purposes.
Pipelined signals are used for faster data transfer while non-pipelined signals are used for simpler designs.
Lock up la...
Resetting a tap controller without trst signals and finding coverage gaps.
For resetting a tap controller without trst signals, we can use a power-on reset circuit or a watchdog timer.
To find coverage gaps, we can use code coverage analysis tools like CodeSonar, Coverity, or LDRA.
We can also use dynamic analysis tools like Valgrind or Purify to find runtime errors and coverage gaps.
Manual testing and peer code reviews c...
I applied via Company Website and was interviewed in Apr 2024. There were 2 interview rounds.
I applied via Internshala and was interviewed in Mar 2024. There was 1 interview round.
posted on 10 Jul 2024
I applied via Job Portal and was interviewed in Jan 2024. There was 1 interview round.
A C program to generate Fibonacci series
Declare variables to store current and previous Fibonacci numbers
Use a loop to calculate and print Fibonacci numbers
Handle edge cases like 0 and 1 separately
A up counter circuit is a digital circuit that counts upwards in binary sequence.
Use flip-flops to store the count value
Connect the output of one flip-flop to the clock input of the next flip-flop
Use logic gates to control the counting sequence
Add a reset input to clear the count when needed
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