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I applied via Naukri.com and was interviewed before Mar 2023. There was 1 interview round.
Common mode range is the range of input common-mode voltage that can be applied to a differential amplifier without causing distortion.
Common mode range is important for ensuring proper operation of a differential amplifier.
It is typically specified in the datasheet of the amplifier.
The common mode range is limited by the supply voltage and the input stage of the amplifier.
For example, if a differential amplifier has a...
Current Mirror Cascode Amp is a configuration where a current mirror is used in the cascode amplifier to improve performance.
Current mirror cascode amp combines the benefits of current mirrors and cascode amplifiers.
It provides high input impedance, low output impedance, and high gain.
The impedance of the current mirror cascode amp is determined by the impedance of the current mirror and the cascode amplifier.
The imped...
I applied via Recruitment Consulltant and was interviewed before Aug 2022. There were 3 interview rounds.
Coding on snippets like Digital Electronics
Design a 6 x 1 multiplexer using conditional statements in RTL
Use if-else statements to select the desired input based on control signals
Ensure proper handling of all input combinations
Consider using case statements for cleaner code implementation
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posted on 14 Oct 2024
I applied via Referral and was interviewed in Sep 2024. There were 2 interview rounds.
posted on 31 Oct 2024
I applied via Walk-in and was interviewed in Oct 2024. There were 3 interview rounds.
posted on 21 Nov 2024
I applied via Recruitment Consulltant and was interviewed in Oct 2024. There were 3 interview rounds.
We have 25 questions and negative marking is there
Storage classes in C language define the scope and lifetime of variables.
There are four storage classes in C: auto, register, static, and extern.
Auto variables are local to the block they are declared in and have automatic storage duration.
Register variables are stored in CPU registers for faster access.
Static variables retain their value between function calls.
Extern variables are declared outside of any function and ...
There are 10 address lines present in 1kb memory.
1kb memory = 1024 bytes
To address 1024 bytes, 10 address lines are needed (2^10 = 1024)
Reverse an array of strings
Create a new array to store the reversed strings
Iterate through the original array in reverse order and add each element to the new array
Return the new array as the reversed array
posted on 26 Nov 2024
I was interviewed in Oct 2024.
The PD flow is the process of designing the physical layout of integrated circuits.
Initial floorplanning to determine the placement of blocks and macros
Placement and optimization of standard cells
Routing of interconnects to connect the various components
Physical verification to ensure design rules are met
Timing closure to meet performance targets
Setup and hold violations can be fixed by adjusting timing constraints, optimizing clock tree, and redesigning critical paths.
Adjust timing constraints to allow more time for signals to propagate
Optimize clock tree to reduce clock skew and improve timing
Redesign critical paths by adding buffers or restructuring logic
Use ECO (Engineering Change Order) to make necessary changes without redoing the entire design
My domain expertise is in physical design engineering, specifically in the areas of floorplanning, placement, routing, and timing closure.
Floorplanning
Placement
Routing
Timing closure
Setup and hold time violations can occur on the same path due to different reasons.
Timing violations can occur due to variations in process, voltage, and temperature (PVT)
Clock skew between different paths can lead to setup and hold violations on the same path
Issues with clock tree synthesis or routing can also contribute to setup and hold time violations
Improper constraints or incorrect timing analysis setup can resul
I am asked to give the coding test and tech questions on resume and job description
I applied via Referral and was interviewed in Nov 2024. There was 1 interview round.
First was aptitude which had questions on analog, digital, network theory, microcontrollers, general aptitude question which was medium level which I clear & got one to one round. In interview he didn't ask much of interview question 1st question was on academic & design verification project, 2nd was on protocol timing diagram for which the interviewer wanted the exact print of specification sheet where my diagram was a little shabby,which made him upset & didn't continue to ask proper questions .
posted on 16 Jan 2025
posted on 24 Aug 2024
I applied via Campus Placement
Online mode of MCQ in college
Similar to round 1 but offline
Arrays, string, conditional clause
Advanced programming questions from DSA, get help from FAQs and Imp leetcode. Concept explanation is must, partial code is enough
Named as design round, more like framing solution for a problem, will be easy.
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Embedded Software Engineer
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RTL Design Engineer
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Analog Layout Engineer
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