Capgemini Engineering Design & Verification Engineer Interview Questions and Answers

All aptitude topics covered

Q1. And gate code in behavioral
Ans. 
Implementing an AND gate in behavioral code
• Use if statements to check if both inputs are high

• Assign the output to high if both inputs are high

• Use Verilog or VHDL syntax depending on the language being used
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Q2. Difference between Ff & latch
Ans. 
FF is edge-triggered, stores data on clock edge. Latch is level-sensitive, stores data as long as enable signal is active.
• FF stores data on clock edge, latch stores data as long as enable signal is active

• FF has two stable states (0 or 1), latch has one stable state (depends on enable signal)

• FF is used for sequential circuits, latch is used for level-sensitive circuits

• Example: D flip-flop (FF) vs SR latch
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The planning if the project and how to take over the project

We should maintain the aptitude to with our project and with with