VNC Group of Companies Interview Questions and Answers

Q1. Sv hvm questions on constraiants and assertions
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Q2. Questions on resume projects
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Q1. Questions on protocols
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Q2. Sv uvm questions
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Q1. Salary and pckge discussion
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Q2. Details on client interview
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Q1. Projects and challenges
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Q2. Sv uvm basics
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Q1. For the first round t is only only.
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Q2. UVM-Phases,config db,resource db,asked me to write code for my projects mentioned in resume
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Q3. AMBA protocols(mentioned in resume) pslave error,decode error,signals,arbitration,interleaving.
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Q4. UVM architecture,verification flow
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Q5. First round mostly focussed on my communication skills and projects mentioned in my resume.For my friend they showed a PPT of questions just followed them.
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Q1. It is a face to face interview,Only focussed on technical questions.They have a common ppt with technical questions .They will show those questions ask you to write answers on a paper.
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Q2. 1.waveform shown asked to find the expression-XOR gate. 2.parity checker and parity generator truthtable and verilog code. 3.modports,clocking blocks and interface sv code. for (addr=something,data=somethi...read more
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Q3. Verilog FIFO code Assertion waveform shown sv code for it APB protocol waveforms Protocols signals if you mention them protocol address calculations coverage code types of array and their syntax
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Q4. For technical round they focus on coding only,don't forget to see all sv topics coding structure.
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Q1. OOPS concept and All Major pillars with Scanrio-based questions asked on Abstract class and Interface
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Q2. .Net MVC and .Net Core based on program.cs file and Dependency Injection and Middleware in deep
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Q3. Pattern question and check string Palindrome
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Q4. SQL Queries around 4th highest salary of Employee
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Q5. All basic programming concept checking like having prefix and postfix expression problem solving on paper
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Q1. TechnoManagerial Round Collection question to find about number of character present in the word Mirafra with live coding F2F
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Q2. API testing ang REST API Concept
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Q3. Professional Journey
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Q4. Project Details
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Q1. It was a director round but say you need to give again technical round ,they wasted my time and money.
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Q2. SQL Queries on pen and paper
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60 mins test which comprises of 2 sections, Technical and aptitude. Both sections have a time limit of 30 mins. The technical questions were easy to medium and i could finish it in time but i needed more time for finishing the aptitude, a total 40 questions.

Q1. Tell me about yourself
Ans. 
I am a recent graduate with a degree in Computer Science and a passion for coding and problem-solving.
• Recent graduate with a degree in Computer Science

• Passionate about coding and problem-solving

• Experience with programming languages like Java, Python, and C++

• Completed internships at tech companies such as Google and Microsoft
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Q2. Find the voltage through the resistor
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To find the voltage through a resistor, use Ohm's Law: V = I * R
• Use Ohm's Law: V = I * R, where V is the voltage, I is the current flowing through the resistor, and R is the resistance of the resistor

• If the current flowing through the resistor is 2A and the resistance is 5 ohms, the voltage would be V = 2 * 5 = 10V

• Make sure to use the correct units for current (Amps) and resistance (Ohms) to get the voltage in Volts
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Q3. The interviewer just kept on adding an extra resistor in parallel and in series to the resistor and asked me to find the voltage
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Q4. He then asked a question on transient analysis ie 2 capacitors connected in series with a switch which closes at t>0 with the voltage across the 2 capacitors being 3 v and asked to find the total voltge
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Q5. Explain the working of a capacitor and resistor and relation between resistance and length , area
Ans. 
Capacitors store electrical energy while resistors limit the flow of current. Resistance is directly proportional to length and inversely proportional to area.
• Capacitors store electrical energy by creating an electric field between two conductive plates separated by an insulating material

• Resistors limit the flow of current in a circuit by dissipating energy in the form of heat

• The resistance of a resistor is directly pr...read more
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Q1. Describe the PD flow
Ans. 
The PD flow is the process of designing the physical layout of integrated circuits.
• Initial floorplanning to determine the placement of blocks and macros

• Placement and optimization of standard cells

• Routing of interconnects to connect the various components

• Physical verification to ensure design rules are met

• Timing closure to meet performance targets
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Q2. How to fix setup and hold violation
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Setup and hold violations can be fixed by adjusting timing constraints, optimizing clock tree, and redesigning critical paths.
• Adjust timing constraints to allow more time for signals to propagate

• Optimize clock tree to reduce clock skew and improve timing

• Redesign critical paths by adding buffers or restructuring logic

• Use ECO (Engineering Change Order) to make necessary changes without redoing the entire design
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Q3. What is you domain experties
Ans. 
My domain expertise is in physical design engineering, specifically in the areas of floorplanning, placement, routing, and timing closure.
• Floorplanning

• Placement

• Routing

• Timing closure
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Q4. Why are you looking for job switch
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Q5. Why does setup and hold ail on same path
Ans. 
Setup and hold time violations can occur on the same path due to different reasons.
• Timing violations can occur due to variations in process, voltage, and temperature (PVT)

• Clock skew between different paths can lead to setup and hold violations on the same path

• Issues with clock tree synthesis or routing can also contribute to setup and hold time violations

• Improper constraints or incorrect timing analysis setup can resul
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1 hour
aptitude test
brain teaser type questions

Q1. What is transistor?
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Q2. What is BJT? where it is used?
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Basic aptitude-10 question,digital moderate -Question,analog moderate -10 question,verilog and system verilog -10 question

Q1. Latches and flip flop all characteristics equation and proof of the characteristics equation in flip flop.applications of flip flop
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Q2. OOPS,INHERITANCE,VERILOG,BLOCKING - NON BLOCKING ASSIGNMENT OPERATOR and all the basic operations of verilog .
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Q3. Discussion on work experience.
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