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I applied via Referral and was interviewed in Nov 2024. There were 3 interview rounds.
Latch is level sensitive and FF is edge sensitive. Latch is transparent while FF is opaque.
Latch is level sensitive, meaning it changes output based on input level. FF is edge sensitive, changing output on clock edge.
Latch is transparent, meaning output changes as soon as input changes. FF is opaque, output changes only on clock edge.
Latch is faster but more prone to glitches. FF is slower but more stable.
Examples: SR
Blocking assignments wait for the assigned statement to complete before moving on, while non-blocking assignments allow for concurrent execution.
Blocking assignments use '=' operator and execute sequentially.
Non-blocking assignments use '<=' operator and allow for concurrent execution.
Blocking assignments are used for combinational logic.
Non-blocking assignments are used for sequential logic.
Example: blocking assign...
I am a recent graduate with a degree in Business Administration and a passion for marketing and project management.
Recent graduate with a degree in Business Administration
Passionate about marketing and project management
Strong communication and organizational skills
Experience in internships and extracurricular activities
I worked on a project to develop a mobile application for tracking fitness goals and progress.
Developed user interface for easy navigation and data input
Integrated features for setting goals, tracking workouts, and monitoring progress
Collaborated with a team of developers and designers to ensure smooth functionality
Conducted user testing to gather feedback for improvements
VLSI stands for Very Large Scale Integration. It involves designing and fabricating integrated circuits with millions of transistors on a single chip.
VLSI involves the design and fabrication of integrated circuits with millions of transistors on a single chip
It is a field within electronic engineering that deals with the miniaturization of circuits to increase functionality and performance
VLSI design involves creating ...
VLSI Design Methodologies using Verilog HDL
Maven Silicon interview questions for popular designations
It was regarding digital electronics.
I applied via Walk-in and was interviewed in Jun 2023. There were 3 interview rounds.
Latch is level triggered, while flip-flop is edge triggered. Latch is asynchronous, while flip-flop is synchronous.
Latch stores data as long as the enable signal is high, while flip-flop stores data only on the rising or falling edge of the clock signal.
Latch is level triggered, meaning it changes output whenever the input changes, while flip-flop is edge triggered, changing output only on clock signal edges.
Latch is a...
Digital circuit design in Verilog including adders, mux, counter, FSM, RAM RTL code, datatypes, and blocking/non-blocking assignments.
Verilog is a hardware description language used for digital circuit design.
Adders are used for arithmetic operations, mux for data selection, counter for counting, and FSM for control logic.
Blocking assignments are executed sequentially, while non-blocking assignments are executed concur...
I applied via Naukri.com and was interviewed before Feb 2023. There were 4 interview rounds.
Based on the electronics and aptitude questions
I applied via Naukri.com and was interviewed in Aug 2023. There was 1 interview round.
I applied via Referral and was interviewed in Aug 2021. There were 3 interview rounds.
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