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I applied via Referral and was interviewed before Jun 2023. There were 2 interview rounds.
DFT stands for Design for Testability, it is a set of techniques used to make testing of integrated circuits more efficient and effective.
DFT helps in ensuring that all parts of the circuit can be tested thoroughly
It includes adding test structures like scan chains, built-in self-test (BIST) circuits, and boundary scan cells
DFT also helps in reducing test time and cost by enabling faster test pattern generation and fau
Expected CTC and current CTC are typically discussed during the interview process to ensure alignment on salary expectations.
Be honest and transparent about your current salary and expected salary range
Research industry standards and company salary ranges to provide a realistic expectation
Consider factors such as experience, skills, location, and job responsibilities when determining expected CTC
There may be some issues in shifting from Bangalore to Hyd, such as adjusting to a new city, finding new accommodation, and building a new social network.
Adjusting to a new city and its culture
Finding new accommodation in Hyderabad
Building a new social network in Hyderabad
Top trending discussions
I am interested in Freescale because of their innovative technology and strong reputation in the industry.
Freescale has a history of developing cutting-edge technology
Their reputation in the industry is strong and respected
I am excited about the opportunity to work with a company that values innovation and excellence
posted on 28 Aug 2016
I applied via Campus Placement
I applied via Recruitment Consulltant and was interviewed before Aug 2021. There was 1 interview round.
Aspect ratio is the ratio of an object's width to its height.
Aspect ratio is commonly used in design and engineering to maintain proportionality.
It is often expressed as a ratio, such as 16:9 for a widescreen TV.
Aspect ratio can affect the visual perception and usability of a product.
It is important to consider aspect ratio when designing graphics or layouts for different devices or mediums.
Stackup is decided based on the number of layers, signal integrity requirements, and manufacturing constraints.
Consider the number of layers required for the design
Evaluate signal integrity requirements and impedance control
Take into account manufacturing constraints such as minimum trace width and spacing
Balance cost and performance
Use simulation tools to optimize the stackup
Consult with PCB fabricators for their reco
I applied via Campus Placement and was interviewed before Jan 2021. There were 3 interview rounds.
A cache is a high-speed data storage layer that stores frequently accessed data to reduce access time. A tag is used to identify the location of data in the cache.
Cache is a temporary storage that holds frequently accessed data
It reduces the access time by providing faster access to data
Tag is used to identify the location of data in the cache
Tag is a part of the cache memory address
Cache can be implemented in hardware...
C Coding questions
posted on 26 Jun 2024
I applied via LinkedIn and was interviewed in May 2024. There was 1 interview round.
Code for constraints
Code for driver
based on 1 interview
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