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Verification Lead/Engineer - System Verilog (3-6 yrs)
TekPillar
posted 10hr ago
Fixed timing
Key skills for the job
Job Description :
Understanding customer requirements on system level verification scenarios
Development of test scenarios in PSS language and in C o SystemVerilog/UVM (as needed)
Execution of test scenarios in pre-silicon (simulation, emulation) and post-silicon environmentsJob Brief :
- Contributing to project planning, effort estimation and actively participating in timely deliverables and risk management keeping customer satisfaction in mind
- Technical contribution towards identified tasks and modules
- Technical leadership of a team or a module, managing dependencies
- Mentoring/coaching other team members on PSS
Must Have Technical Skills :
- Expertise in verification using SystemVerilog/UVM for block and system level verification
- Exposure to C programming as used in embedded systems (in bare-metal / RTOS or OS environments)
- Experienced with verification of controllers for one or more protocols like PCIe, CXL, Ethernet, MIPI CSI/DSI, USB, SPI, I2C, GPIO.
- Experience in using Verification IPs (VIPs) for the above protocols.
- Experienced in verification on emulator (Zebu/Palladium/Veloce) environments.
Good to Have Technical Skills :
- Understanding of complex I/O protocols like Ethernet, PCIe, USB etc is a plus.
- Exposure to power management of a modern SoC is a plus
- Prior experience on PSS is a plus
- Experience in directly working with customers
Behavioural/ Non Technical :
- Strong analytical and problem-solving skills
- Excellent verbal and written communication skills
- Self-managed and ability to learn and adapt
- Eager to take on new challenging work
Functional Areas: Other
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