i
Synopsys
Filter interviews by
I appeared for an interview in Jan 2025, where I was asked the following questions.
I applied via Campus Placement and was interviewed in Sep 2024. There were 2 interview rounds.
Basic aptitude-10 question,digital moderate -Question,analog moderate -10 question,verilog and system verilog -10 question
I appeared for an interview in Jun 2025, where I was asked the following questions.
My decision to pursue VLSI Design and Verification stems from my passion for technology and its impact on modern electronics.
Interest in semiconductor technology: I have always been fascinated by how tiny chips power our devices.
Problem-solving skills: VLSI design involves complex challenges that require innovative solutions, which I enjoy tackling.
Career opportunities: The demand for VLSI engineers is growing, providi...
Analog signals are continuous, while digital signals are discrete, representing data in binary form.
Analog signals vary continuously and can take any value within a range (e.g., sound waves).
Digital signals represent data in binary (0s and 1s), making them more robust against noise (e.g., computer data).
Analog signals are used in applications like audio and video transmission, while digital signals are used in computer...
Cocubes online aptitude test with some questions on electronics
Convert a number into words
Break the number into groups of three digits
Convert each group into words using a lookup table
Combine the words with appropriate magnitude (thousand, million, billion, etc.)
I applied via Referral and was interviewed in Apr 2024. There was 1 interview round.
A frequency divider reduces the frequency of an input signal by a specified factor, often used in digital circuits.
A frequency divider can be implemented using flip-flops.
For example, a divide-by-2 circuit can be made with a D flip-flop.
The output frequency is half of the input frequency.
Frequency dividers are commonly used in clock generation.
They can be cascaded to achieve higher division factors.
Latches are level-sensitive devices, while flip-flops are edge-sensitive, used for storing binary data in digital circuits.
Latches are transparent when enabled, allowing data to pass through.
Flip-flops change state only on specific clock edges (rising or falling).
Example of a latch: SR latch, which can hold a state based on Set and Reset inputs.
Example of a flip-flop: D flip-flop, which captures the input value on the ...
General aptitude questions
Problem solving, solved 2 out of 3 questions
General topics were given in gd
I applied via Campus Placement and was interviewed in Aug 2024. There were 3 interview rounds.
Aotitude,core que on all subjects in ece
I completed a 6-month internship at XYZ Company where I gained hands-on experience in physical design tools and methodologies.
Worked on floorplanning, placement, and routing of digital designs
Utilized tools such as Cadence Innovus and Synopsys ICC
Collaborated with cross-functional teams to optimize design performance
posted on 17 Aug 2024
Tree traversal with vertical order involves traversing a binary tree in a top-to-bottom order for each vertical column.
Use a hashmap to store nodes at each vertical level
Perform a level order traversal and update the hashmap with nodes at each vertical level
Sort the keys of the hashmap to get the nodes in vertical order
Phonebook app for storing and organizing contacts
Allow users to add, edit, and delete contacts
Include search functionality for easy access to contacts
Implement sorting options by name, phone number, etc.
Provide option to categorize contacts into groups or favorites
I appeared for an interview in May 2025, where I was asked the following questions.
Top trending discussions
Some of the top questions asked at the Synopsys interview -
The duration of Synopsys interview process can vary, but typically it takes about less than 2 weeks to complete.
based on 73 interview experiences
Difficulty level
Duration
based on 389 reviews
Rating in categories
Staff Engineer
172
salaries
| ₹25 L/yr - ₹45 L/yr |
R&D Engineer
160
salaries
| ₹14.1 L/yr - ₹23 L/yr |
Senior R&D Engineer
94
salaries
| ₹16.8 L/yr - ₹27.1 L/yr |
Software Engineer
78
salaries
| ₹11.8 L/yr - ₹18 L/yr |
Security Consultant
74
salaries
| ₹6.5 L/yr - ₹15.7 L/yr |
Intel
Apar Industries
Molex
TDK India Private Limited