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Synopsys Applications Engineer Interview Questions, Process, and Tips

Updated 14 Dec 2024

Top Synopsys Applications Engineer Interview Questions and Answers

Synopsys Applications Engineer Interview Experiences

7 interviews found

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Referral and was interviewed in Apr 2024. There was 1 interview round.

Round 1 - Technical 

(5 Questions)

  • Q1. Focus on Basics of Digital electronics,verilog SV and UVM will be an advantage.Reasoning questions also plays a crucial role.Realizations of gates using and NAND and NOR gate,Realization of gates using mu...
  • Q2. Don't forget look your projects mentioned in your resume,They will directky ask you to write code,Ask lot of questions on projects,Communication skills willbe added advantage.
  • Q3. Reasonig questions:-9 ball's weight checking,horses question,a pond of flowers on which day they full if half fill in 10 days,3L 5L required water 4L,4 pin OTP generation probability with unique numbers,go...
  • Q4. Don't forget take a look on ypur projects whatever you mentioned in your resume everything matters,Basics of digital electronics,sv and UVM,More focus on practising coding,outputs for snippets plays a cruc...
  • Q5. One personal advantage for MNC's refferals matters alot,better to ask anyone in linkdin to reffer you.
Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. FPGA architecture
  • Q2. Static Timing Analysis

Applications Engineer Interview Questions Asked at Other Companies

Q1. Minimum Special Sum Problem You are given an array ARR of length ... read more
Q2. Missing Number Problem Statement You are provided with an array n ... read more
Q3. Number Pattern Problem Statement Given an integer 'N', print a sp ... read more
Q4. Spiral Matrix Problem Statement You are given a N x M matrix of i ... read more
Q5. Pattern Printing Task You are tasked with printing a specific pat ... read more
Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(1 Question)

  • Q1. Flop design using gates
  • Ans. 

    Designing a flop using gates

    • A flop is a fundamental building block in digital circuits used for storing and synchronizing data

    • It can be designed using basic logic gates such as AND, OR, and NOT gates

    • The most common flop design is the D flip-flop, which has a data input (D), a clock input (CLK), and an output (Q)

    • The D flip-flop can be implemented using a combination of gates, such as an AND gate, an OR gate, and a NOT g...

  • Answered by AI
Round 2 - Technical 

(1 Question)

  • Q1. D flop using nand gates
  • Ans. 

    A D flip-flop can be implemented using NAND gates.

    • A D flip-flop is a sequential logic circuit that stores a single bit of data.

    • It has two inputs: D (data) and CLK (clock) and two outputs: Q (output) and Q' (complement of output).

    • A D flip-flop changes its output state based on the input D and the clock signal.

    • The D flip-flop can be implemented using NAND gates by connecting them in a specific configuration.

    • The circuit d...

  • Answered by AI
Interview experience
4
Good
Difficulty level
Easy
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Company Website and was interviewed before Dec 2023. There were 4 interview rounds.

Round 1 - Technical 

(1 Question)

  • Q1. Digital related to ff,mux,waveform,fsm
Round 2 - Technical 

(1 Question)

  • Q1. Sta max frew ,setup and hold time , numerical questions
Round 3 - Technical 

(1 Question)

  • Q1. Fpga architecture,flow ,related to tool ,ram ,fifo
Round 4 - HR 

(1 Question)

  • Q1. Hr question,do you work for longer in this organisation,future goals, willing to relocate

Synopsys interview questions for designations

 Technical Engineer

 (2)

 Software Engineer

 (3)

 Hardware Engineer

 (2)

 Design Engineer

 (1)

 Security Engineer

 (1)

 Principal Engineer

 (1)

 Data Engineer

 (1)

 Sdet Engineer

 (1)

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Approached by Company and was interviewed before Jun 2023. There was 1 interview round.

Round 1 - Technical 

(5 Questions)

  • Q1. PNR flow and questions related to each stage like floorplanning guidelines, how to do macro placement etc.
  • Q2. Challenges you faced in Placement stage, how did you resolve congestion in your design. How to improve timing.
  • Q3. CTS spec files, inverters or buffers which is preferable. Skew and latency related questions
  • Q4. Detailed discussion about crosstalk, antenna effects and Electromigration
  • Q5. Basic TCL scripts to write

Interview Preparation Tips

Interview preparation tips for other job seekers - Please have a good knowledge of ASIC flow and TCL scripting. Also explain properly about your past projects.

I applied via Naukri.com and was interviewed in Dec 2021. There were 3 interview rounds.

Interview Questionnaire 

4 Questions

  • Q1. About Docker commands, postgres and kubernetes.
  • Q2. Commands like vaccum analyse.
  • Q3. Volumes in docker
  • Ans. 

    Volumes in Docker are used to persist data outside of containers.

    • Volumes can be created and managed using the `docker volume` command.

    • They can be mounted to containers using the `--mount` or `-v` flag.

    • Volumes can be shared between multiple containers.

    • They can also be backed up and restored easily.

    • Examples of using volumes include storing database data or configuration files.

  • Answered by AI
  • Q4. Kubernetes architecture

Interview Preparation Tips

Interview preparation tips for other job seekers - It was average kind of question

Skills evaluated in this interview

Applications Engineer Jobs at Synopsys

View all

I applied via Campus Placement and was interviewed in Sep 2021. There were 4 interview rounds.

Interview Questionnaire 

3 Questions

  • Q1. Mosfet basics
  • Q2. Setup, hold time
  • Q3. Verilog code for d-ff
  • Ans. 

    Verilog code for d-ff

    • Declare input and output ports

    • Use always block to implement the functionality

    • Use non-blocking assignment for output

    • Use blocking assignment for clock and reset

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - It consists of 2 round
1. Online test
2. Technical - HR round.
Focus on basics .
Digital electronics, Verilog hdl,STA.

Skills evaluated in this interview

Interview questions from similar companies

I was interviewed in Apr 2017.

Interview Questionnaire 

1 Question

  • Q1. What is the difference between latch and flip flop
  • Ans. 

    A latch is level-sensitive and a flip flop is edge-triggered.

    • A latch is transparent, meaning its output changes immediately with the input.

    • A flip flop is triggered by a clock signal, changing its output only on the rising or falling edge of the clock.

    • Latches are commonly used in asynchronous circuits, while flip flops are used in synchronous circuits.

    • Examples of latches include SR latch, D latch, and JK latch.

    • Examples ...

  • Answered by AI

Interview Preparation Tips

Round: Technical Interview
Experience: There were two sections analog electronics and digital electronics. I cleared 1st section and not so well with other section

Skills: Analog Circuits
College Name: Siddaganga institute of technology

Interview Questionnaire 

1 Question

  • Q1. Tell a situation in your life when you are preparing for a success at a instance you thought you won’t achieve it but you later u succeeded it due to your hard work
  • Ans. 

    I once thought I couldn't pass a difficult exam, but with hard work and determination, I succeeded.

    • I was studying for a certification exam that had a low pass rate

    • I struggled with the material and felt overwhelmed

    • I created a study schedule and stuck to it, even when it was difficult

    • I sought help from colleagues and mentors when I needed it

    • On the day of the exam, I felt nervous but confident in my preparation

    • I ended up ...

  • Answered by AI

Interview Preparation Tips

Round: Test
Experience: one word answers [they asked on digital and analog circuits and computer organization, some basics of analog and digital Ics and simple aptitude [1 Q]]. 8 CG cutoff, marks unknown. Similar to questions asked in our academic exams.
Duration: 90 minutes

Round: Technical Interview
Experience: It was basically resume based. They asked about internship [work and knowledge, DDP [Prof Kamlesh - Grid tied solar inverter [control techniques]], computer organization.]

Round: Technical Interview
Experience: Circuit design for micro controller [both analog and digital-1 analog input varies from 0-10 volt and from 0-5 v relay 1 should be on and if it is 5-10 V relay 2 should be on- , Embed coding - C coding is enough [micro processor lab], basic power electronic course.]

Round: Technical Interview
Experience: system level interview - design a weighing machine, power and capacitance measuring device. They will analyze your working and thinking skills [measurement course, A&D circuits]Basic power and device questions [EMC and solid state devices]

Round: HR Interview
Experience: General HR round questions asking about personal life.

College Name: IIT MADRAS

I applied via Campus Placement and was interviewed in Dec 2016. There were 2 interview rounds.

Interview Preparation Tips

Round: Technical Interview
Experience: mainly about opamp filters , digital IC design , microcontrollers and finally about the projects that i did

Round: HR Interview
Experience: Some basic hr questions.

College Name: IIT Madras
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Synopsys Interview FAQs

How many rounds are there in Synopsys Applications Engineer interview?
Synopsys interview process usually has 1-2 rounds. The most common rounds in the Synopsys interview process are Technical and HR.
How to prepare for Synopsys Applications Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Synopsys. The most common topics and skills that interviewers at Synopsys expect are Chip Design, Perl, Artificial Intelligence, VHDL and Physical Design.
What are the top questions asked in Synopsys Applications Engineer interview?

Some of the top questions asked at the Synopsys Applications Engineer interview -

  1. Verilog code for d...read more
  2. flop design using ga...read more
  3. D flop using nand ga...read more

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Synopsys Applications Engineer Interview Process

based on 6 interviews

1 Interview rounds

  • Technical Round
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Synopsys Applications Engineer Salary
based on 58 salaries
₹11 L/yr - ₹25.6 L/yr
122% more than the average Applications Engineer Salary in India
View more details

Synopsys Applications Engineer Reviews and Ratings

based on 17 reviews

3.9/5

Rating in categories

2.9

Skill development

3.6

Work-life balance

3.4

Salary

3.7

Job security

3.8

Company culture

3.2

Promotions

3.2

Work satisfaction

Explore 17 Reviews and Ratings
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Hyderabad / Secunderabad

1-2 Yrs

₹ 13-16.2 LPA

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3-8 Yrs

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