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Tessolve Applications Engineer Interview Questions and Answers

Updated 28 Jun 2023

Tessolve Applications Engineer Interview Experiences

1 interview found

Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Don’t add your photo or details such as gender, age, and address in your resume. These details do not add any value.
View all tips
Round 2 - Technical 

(1 Question)

  • Q1. What is impedance matching
  • Ans. 

    Impedance matching is the process of designing a system to ensure maximum power transfer between components.

    • Impedance matching is important in electronics to prevent signal reflections and ensure efficient power transfer.

    • It involves adjusting the impedance of components to match the source and load impedance.

    • Examples include matching the impedance of antennas to transmission lines in RF systems.

    • Impedance matching is co...

  • Answered by AI
Round 3 - HR 

(1 Question)

  • Q1. Tell me about your self

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Can speak English, can’t deliver in interviews
I feel like I can't speak fluently during interviews. I do know english well and use it daily to communicate, but the moment I'm in an interview, I just get stuck. since it's not my first language, I struggle to express what I actually feel. I know the answer in my head, but I just can’t deliver it properly at that moment. Please guide me
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Interview questions from similar companies

Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
Selected Selected
Round 1 - Technical 

(2 Questions)

  • Q1. Explain the working of CMOS inverter
  • Ans. 

    CMOS inverter is a type of logic gate that converts input signals into their complementary outputs.

    • CMOS inverter consists of a PMOS transistor and an NMOS transistor connected in series.

    • When input is high, PMOS conducts and NMOS is off, resulting in output low.

    • When input is low, NMOS conducts and PMOS is off, resulting in output high.

    • CMOS technology is widely used in digital integrated circuits due to its low power con...

  • Answered by AI
  • Q2. Write a verilog code for sequence detectro
  • Ans. 

    Verilog code for sequence detector

    • Use state machines to detect the desired sequence

    • Define states for each part of the sequence

    • Use combinational logic to transition between states

    • Implement the Verilog code using if-else statements and always blocks

  • Answered by AI

Skills evaluated in this interview

Applications Engineer Interview Questions Asked at Other Companies

Q1. Minimum Special Sum Problem You are given an array ARR of length ... read more
Q2. Missing Number Problem Statement You are provided with an array n ... read more
Q3. Number Pattern Problem Statement Given an integer 'N', print a sp ... read more
Q4. Spiral Matrix Problem Statement You are given a N x M matrix of i ... read more
Q5. Pattern Printing Task You are tasked with printing a specific pat ... read more
Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(2 Questions)

  • Q1. FPGA architecture
  • Q2. Static Timing Analysis
Interview experience
4
Good
Difficulty level
Easy
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Company Website and was interviewed before Dec 2023. There were 4 interview rounds.

Round 1 - Technical 

(1 Question)

  • Q1. Digital related to ff,mux,waveform,fsm
Round 2 - Technical 

(1 Question)

  • Q1. Sta max frew ,setup and hold time , numerical questions
Round 3 - Technical 

(1 Question)

  • Q1. Fpga architecture,flow ,related to tool ,ram ,fifo
Round 4 - HR 

(1 Question)

  • Q1. Hr question,do you work for longer in this organisation,future goals, willing to relocate

I applied via Referral and was interviewed in Jun 2022. There were 2 interview rounds.

Round 1 - Aptitude Test 

Technical+apptitude round questions were tough in technical

Round 2 - Technical 

(2 Questions)

  • Q1. Mostly on filters block diagrams ,opamps,converters etc
  • Q2. What is physical significance of 2nd order on filtwrs
  • Ans. 

    Second order filters have steeper roll-off and better attenuation of higher frequencies.

    • Second order filters have a slope of -40 dB/decade.

    • They have a higher Q factor than first order filters.

    • They provide better attenuation of higher frequencies.

    • Examples include Butterworth, Chebyshev, and Bessel filters.

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - Analog must be perfect they will jidge on your approach not answer
Interview experience
3
Average
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Dec 2022. There were 4 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Aptitude Test 

Basic aptitude, but limited time.

Round 3 - Technical 

(3 Questions)

  • Q1. Semiconductor fabrication-related questions
  • Q2. Material characterization techniques
  • Ans. 

    Material characterization techniques involve analyzing the properties of materials to understand their composition and behavior.

    • Common techniques include X-ray diffraction, scanning electron microscopy, and Fourier transform infrared spectroscopy.

    • These techniques help determine material composition, crystal structure, surface morphology, and chemical bonding.

    • Other techniques like thermal analysis, mechanical testing, a...

  • Answered by AI
  • Q3. Company related questions
Round 4 - HR 

(1 Question)

  • Q1. Interest to travel, behavioral round questions.
Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(1 Question)

  • Q1. Flop design using gates
  • Ans. 

    Designing a flop using gates

    • A flop is a fundamental building block in digital circuits used for storing and synchronizing data

    • It can be designed using basic logic gates such as AND, OR, and NOT gates

    • The most common flop design is the D flip-flop, which has a data input (D), a clock input (CLK), and an output (Q)

    • The D flip-flop can be implemented using a combination of gates, such as an AND gate, an OR gate, and a NOT g...

  • Answered by AI
Round 2 - Technical 

(1 Question)

  • Q1. D flop using nand gates
  • Ans. 

    A D flip-flop can be implemented using NAND gates.

    • A D flip-flop is a sequential logic circuit that stores a single bit of data.

    • It has two inputs: D (data) and CLK (clock) and two outputs: Q (output) and Q' (complement of output).

    • A D flip-flop changes its output state based on the input D and the clock signal.

    • The D flip-flop can be implemented using NAND gates by connecting them in a specific configuration.

    • The circuit d...

  • Answered by AI
Are these interview questions helpful?

I applied via Campus Placement and was interviewed in Sep 2021. There were 4 interview rounds.

Interview Questionnaire 

3 Questions

  • Q1. Mosfet basics
  • Q2. Setup, hold time
  • Q3. Verilog code for d-ff
  • Ans. 

    Verilog code for d-ff

    • Declare input and output ports

    • Use always block to implement the functionality

    • Use non-blocking assignment for output

    • Use blocking assignment for clock and reset

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - It consists of 2 round
1. Online test
2. Technical - HR round.
Focus on basics .
Digital electronics, Verilog hdl,STA.

Skills evaluated in this interview

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Referral and was interviewed in Apr 2024. There was 1 interview round.

Round 1 - Technical 

(5 Questions)

  • Q1. Focus on Basics of Digital electronics,verilog SV and UVM will be an advantage.Reasoning questions also plays a crucial role.Realizations of gates using and NAND and NOR gate,Realization of gates using mu...
  • Q2. Don't forget look your projects mentioned in your resume,They will directky ask you to write code,Ask lot of questions on projects,Communication skills willbe added advantage.
  • Q3. Reasonig questions:-9 ball's weight checking,horses question,a pond of flowers on which day they full if half fill in 10 days,3L 5L required water 4L,4 pin OTP generation probability with unique numbers,go...
  • Q4. Don't forget take a look on ypur projects whatever you mentioned in your resume everything matters,Basics of digital electronics,sv and UVM,More focus on practising coding,outputs for snippets plays a cruc...
  • Q5. One personal advantage for MNC's refferals matters alot,better to ask anyone in linkdin to reffer you.
Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Approached by Company and was interviewed before Jun 2023. There was 1 interview round.

Round 1 - Technical 

(5 Questions)

  • Q1. PNR flow and questions related to each stage like floorplanning guidelines, how to do macro placement etc.
  • Q2. Challenges you faced in Placement stage, how did you resolve congestion in your design. How to improve timing.
  • Q3. CTS spec files, inverters or buffers which is preferable. Skew and latency related questions
  • Q4. Detailed discussion about crosstalk, antenna effects and Electromigration
  • Q5. Basic TCL scripts to write
  • Ans. 

    Basic TCL scripts can automate tasks, manipulate data, and control applications effectively.

    • Creating a simple variable: set myVar 10

    • Using arrays: array set myArray {key1 value1 key2 value2}

    • Looping through an array: foreach key [array names myArray] {puts "$key: $myArray($key)"}

    • Defining a procedure: proc myProc {arg1 arg2} {return [expr {$arg1 + $arg2}]}

    • Reading from a file: set fileId [open "myfile.txt" r]; set content ...

  • Answered by AI

Interview Preparation Tips

Interview preparation tips for other job seekers - Please have a good knowledge of ASIC flow and TCL scripting. Also explain properly about your past projects.

Tessolve Interview FAQs

How many rounds are there in Tessolve Applications Engineer interview?
Tessolve interview process usually has 3 rounds. The most common rounds in the Tessolve interview process are Resume Shortlist, Technical and HR.

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Overall Interview Experience Rating

4/5

based on 1 interview experience

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