Tessolve Semiconductor Applications Engineer Interview Questions and Answers

Technical+apptitude round questions were tough in technical

Q1. Mostly on filters block diagrams ,opamps,converters etc
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Q2. What is physical significance of 2nd order on filtwrs
Ans. 
Second order filters have steeper roll-off and better attenuation of higher frequencies.
• Second order filters have a slope of -40 dB/decade.

• They have a higher Q factor than first order filters.

• They provide better attenuation of higher frequencies.

• Examples include Butterworth, Chebyshev, and Bessel filters.
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Basic aptitude, but limited time.

Q1. Semiconductor fabrication-related questions
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Q2. Material characterization techniques
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Material characterization techniques involve analyzing the properties of materials to understand their composition and behavior.
• Common techniques include X-ray diffraction, scanning electron microscopy, and Fourier transform infrared spectroscopy.

• These techniques help determine material composition, crystal structure, surface morphology, and chemical bonding.

• Other techniques like thermal analysis, mechanical testing, a...read more
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Q3. Company related questions
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Q1. Interest to travel, behavioral round questions.
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Q1. Digital related to ff,mux,waveform,fsm
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Q1. Sta max frew ,setup and hold time , numerical questions
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Q1. Fpga architecture,flow ,related to tool ,ram ,fifo
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Q1. Hr question,do you work for longer in this organisation,future goals, willing to relocate
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Q1. Focus on Basics of Digital electronics,verilog SV and UVM will be an advantage.Reasoning questions also plays a crucial role.Realizations of gates using and NAND and NOR gate,Realization of gates using mu...read more
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Q2. Don't forget look your projects mentioned in your resume,They will directky ask you to write code,Ask lot of questions on projects,Communication skills willbe added advantage.
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Q3. Reasonig questions:-9 ball's weight checking,horses question,a pond of flowers on which day they full if half fill in 10 days,3L 5L required water 4L,4 pin OTP generation probability with unique numbers,go...read more
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Q4. Don't forget take a look on ypur projects whatever you mentioned in your resume everything matters,Basics of digital electronics,sv and UVM,More focus on practising coding,outputs for snippets plays a cruc...read more
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Q5. One personal advantage for MNC's refferals matters alot,better to ask anyone in linkdin to reffer you.
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Q1. FPGA architecture
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Q2. Static Timing Analysis
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Q1. Flop design using gates
Ans. 
Designing a flop using gates
• A flop is a fundamental building block in digital circuits used for storing and synchronizing data

• It can be designed using basic logic gates such as AND, OR, and NOT gates

• The most common flop design is the D flip-flop, which has a data input (D), a clock input (CLK), and an output (Q)

• The D flip-flop can be implemented using a combination of gates, such as an AND gate, an OR gate, and a NOT g...read more
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Q1. D flop using nand gates
Ans. 
A D flip-flop can be implemented using NAND gates.
• A D flip-flop is a sequential logic circuit that stores a single bit of data.

• It has two inputs: D (data) and CLK (clock) and two outputs: Q (output) and Q' (complement of output).

• A D flip-flop changes its output state based on the input D and the clock signal.

• The D flip-flop can be implemented using NAND gates by connecting them in a specific configuration.

• The circuit d...read more
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Q1. PNR flow and questions related to each stage like floorplanning guidelines, how to do macro placement etc.
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Q2. Challenges you faced in Placement stage, how did you resolve congestion in your design. How to improve timing.
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Q3. CTS spec files, inverters or buffers which is preferable. Skew and latency related questions
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Q4. Detailed discussion about crosstalk, antenna effects and Electromigration
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Q5. Basic TCL scripts to write
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