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Proficient in Solidworks 2019 with experience in designing complex mechanical systems.
Expertise in creating 3D models, assemblies, and drawings
Ability to perform simulations and analysis using Solidworks Simulation
Experience in designing complex mechanical systems such as robotic arms and automated machinery
Proficient in using Solidworks PDM for managing design data
Familiarity with Solidworks Electrical for designing e...
I applied via Walk-in and was interviewed in Jan 2023. There were 3 interview rounds.
I appeared for an interview before Mar 2023.
Mortar is a mixture of cement, sand, and water used to bind building blocks. There are different types of mortar based on their composition and application.
Types of mortar include cement mortar, lime mortar, and gypsum mortar
Cement mortar is commonly used for construction and is made of cement, sand, and water
Lime mortar is used for historic preservation and is made of lime, sand, and water
Gypsum mortar is used for pla
Transfarma is not a known term. No answer available.
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I applied via Referral and was interviewed before Sep 2020. There was 1 interview round.
I applied via Referral and was interviewed in Feb 2020. There were 6 interview rounds.
I appeared for an interview in Feb 2025, where I was asked the following questions.
I applied via Referral and was interviewed before Feb 2023. There was 1 interview round.
Using if, vlookup, sumif for data cleaning and proper function in Excel
Use IF function to create conditional statements for data cleaning
Use VLOOKUP function to search for a value in a table and return a corresponding value
Use SUMIF function to sum values based on a specific condition
Exercise: Use IF function to categorize data into different groups based on a condition
Exercise: Use VLOOKUP function to retrieve employe...
I applied via Campus Placement and was interviewed before Oct 2022. There were 3 interview rounds.
UVM is a methodology for verifying complex designs using SystemVerilog. Blocking assignments execute sequentially, while non-blocking assignments execute concurrently.
UVM (Universal Verification Methodology) is a standardized methodology for verifying complex designs in SystemVerilog.
Blocking assignments in SystemVerilog execute sequentially, meaning the next statement waits for the current statement to finish.
Non-bloc...
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