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C DOT Interview Questions and Answers
7 Interview questions
BPSK (Binary Phase Shift Keying) is a digital modulation scheme that conveys data by changing the phase of a carrier wave.
BPSK uses two phases to represent binary data: 0 and 1.
The phase shift is typically 180 degrees between the two states.
It is robust against noise, making it suitable for low-bandwidth applications.
Example: In a BPSK system, a phase of 0 degrees might represent a binary '0', while 180 degrees re...
GST stands for Goods and Services Tax, a value-added tax levied on most goods and services sold for domestic consumption.
GST is a consumption tax that is ultimately borne by the end consumer.
It is a single tax on the supply of goods and services, right from the manufacturer to the consumer.
GST eliminates the cascading effect of taxes by allowing input tax credit across the supply chain.
There are different rates of...
JK Flip-Flop is a digital memory circuit with two inputs (J and K) and one output (Q), used for storing binary data.
The JK Flip-Flop has two inputs: J (set) and K (reset).
It has a clock input that triggers state changes.
When J=1 and K=0, Q is set to 1.
When J=0 and K=1, Q is reset to 0.
When J=1 and K=1, Q toggles its state.
The state table summarizes the behavior based on J and K inputs.
Latch is level triggered and flip flop is edge triggered. Flip flop has clock input while latch does not.
Latch is level triggered, while flip flop is edge triggered
Flip flop has a clock input, while latch does not
Latch is asynchronous, while flip flop is synchronous
Flip flop stores data in two stable states (0 or 1), while latch stores data in one stable state
Examples: SR latch, D flip flop
Digital offers better accuracy, flexibility, and storage capabilities than analog.
Digital signals can be processed and manipulated with greater precision than analog signals.
Digital systems are more flexible and can be easily reconfigured or updated compared to analog systems.
Digital data can be easily stored and retrieved, whereas analog data requires physical storage space.
Examples include digital audio and vide...
Memory layout in C program refers to how variables are stored in memory.
Variables are stored in memory in a specific order based on their data types and sizes.
Local variables are typically stored on the stack, while dynamically allocated memory is stored on the heap.
Memory layout also includes the concept of memory alignment to optimize memory access.
Example: int x; char c; double d; will be stored in memory as x ...
Sampling is the process of converting continuous signals into discrete signals. Quantization is the process of converting analog signals into digital signals.
Sampling involves taking a continuous signal and converting it into a series of discrete values at regular intervals.
Quantization involves taking an analog signal and converting it into a digital signal by assigning a numerical value to each discrete sample.
S...
C DOT Interview Experiences
29 interviews found
Anonymous
Selected
I appeared for an interview in Mar 2025, where I was asked the following questions.
- Q1. Based on company questions only.
- Q2. Electronics based questions only
Interview Preparation Tips
Selected
Virtual interview after shortlisted
1-2 Med level coding qn approach and implementation
(2 Questions)
- Q1. Qn related to Project i worked
- Q2. Qn related techstacks i were used in the project and why i choose that techstack etc.
(1 Question)
- Q1. Normal Behavioral qns
Selected
(3 Questions)
- Q1. Function overloading, Question related with pointers in c input output
- Q2. Memory layout in c program
- Ans.
Memory layout in C program refers to how variables are stored in memory.
Variables are stored in memory in a specific order based on their data types and sizes.
Local variables are typically stored on the stack, while dynamically allocated memory is stored on the heap.
Memory layout also includes the concept of memory alignment to optimize memory access.
Example: int x; char c; double d; will be stored in memory as x -> c ...
- Q3. Os virtual memory
Skills evaluated in this interview
Selected
I appeared for an interview in Sep 2024, where I was asked the following questions.
- Q1. Questions based on verilog
- Q2. FPGA related questions
Selected
I applied via Campus Placement and was interviewed in Oct 2023. There were 2 interview rounds.
(4 Questions)
- Q1. JK FF diagram and state table
- Ans.
JK Flip-Flop is a digital memory circuit with two inputs (J and K) and one output (Q), used for storing binary data.
The JK Flip-Flop has two inputs: J (set) and K (reset).
It has a clock input that triggers state changes.
When J=1 and K=0, Q is set to 1.
When J=0 and K=1, Q is reset to 0.
When J=1 and K=1, Q toggles its state.
The state table summarizes the behavior based on J and K inputs.
- Q2. Resistor color coding, pipelining
- Q3. Few projects related
- Q4. Fan-in, Fan-out, understanding of microcontroller
Interview Preparation Tips
- Digital Electronics
Selected
I applied via Cdot and was interviewed in Aug 2023. There were 3 interview rounds.
(3 Questions)
- Q1. Basic Analog and digital electronics questions, PLL , SHD reciever
- Q2. What is difference between latch and flip flop?
- Ans.
Latch is level triggered and flip flop is edge triggered. Flip flop has clock input while latch does not.
Latch is level triggered, while flip flop is edge triggered
Flip flop has a clock input, while latch does not
Latch is asynchronous, while flip flop is synchronous
Flip flop stores data in two stable states (0 or 1), while latch stores data in one stable state
Examples: SR latch, D flip flop
- Q3. How to remove Metastable problem ?
- Ans.
Metastable problem can be removed by carefully designing the system to prevent sudden changes in input signals.
Ensure proper grounding and shielding to minimize external interference.
Use filtering techniques to remove noise from input signals.
Implement hysteresis in the system to prevent rapid switching between states.
Calibrate sensors and components regularly to maintain accuracy.
Utilize feedback control systems to st...
(1 Question)
- Q1. About FPGA, Digital electronics , Metastable,
Interview Preparation Tips
I applied via Campus Placement and was interviewed in Nov 2023. There was 1 interview round.
(1 Question)
- Q1. Introduce Yourself, Explain my projects, they need communication engineers so they werent much interested in me, so asked some basic questions regarding communication .
Interview Preparation Tips
- Signals and systems
- Advanced communication engineeri
Selected
I applied via Naukri.com and was interviewed before Aug 2023. There were 2 interview rounds.
(5 Questions)
- Q1. Chetan Uddin gym ISS Uddin
- Q2. Gg gg gg gg yy gg yy gg
- Q3. Xx civics gg cc cc
- Q4. TT FF yy ICICI gg given
- Q5. Uff uff Gunn hii hii hubb jibon hubb
Gg gg pass gg gg driven huun bheed BB BB
Interview Preparation Tips
I applied via Campus Placement and was interviewed in Jan 2024. There was 1 interview round.
(2 Questions)
- Q1. Cmrr, op amp, digital electronics
- Q2. Project related questions
Interview Preparation Tips
I applied via Campus Placement and was interviewed in Oct 2023. There was 1 interview round.
(1 Question)
- Q1. Technical questions stemmed initially from projects mentioned in CV, and follow up questions thereafter. Mostly based on communications (ISI, OFDM), EM theory, control system basics, digital electronics, s...
Interview Preparation Tips
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