Apar Industries JE Interview Questions and Answers

Q1. How to predict if a 32 bit number is divisible by 8, draw a circuit using gates
Ans. 
To predict if a 32 bit number is divisible by 8, design a circuit using gates.
• Use a circuit with AND, OR, and NOT gates to check if the last three bits of the number are all zeros.

• If the last three bits are zeros, then the number is divisible by 8.

• For example, if the 32 bit number is 11010000, the last three bits are zeros, so it is divisible by 8.
Answered by AI
Add your answer
Q2. Various verilog scripting questions
Add your answer

Q1. Why do you want to work at Synopsys?
Ans. 
I want to work at Synopsys because of their reputation for innovation and cutting-edge technology in the field of ASIC design verification.
• Synopsys is a leader in the EDA industry, known for their advanced tools and solutions for semiconductor design.

• I am impressed by Synopsys' commitment to research and development, which aligns with my passion for pushing the boundaries of technology.

• I believe working at Synopsys wil...read more
Answered by AI
Add your answer
Q2. Talk us a little bit about yourself
Add your answer

3 sections in exam
Aptitude,digital and verilog
Gate previous year will do for digital

Q1. Basic digital like difference between latch and flipflop,Moore vs mealey which one is better
Add your answer

Q1. Verilog coding A 100hz square wave signal 50 percent duty cycle is given Write verilog code for dividing frequency of signal by 3.
Ans. 
Verilog code to divide frequency of a 100hz square wave signal with 50% duty cycle by 3.
• Create a counter that counts up to 3 and resets back to 0

• Use the counter to toggle an output signal every 3 cycles of the input signal

• The output signal will have a frequency of 100/3 = 33.33hz with 50% duty cycle
Answered by AI
View 1 more answer