Asic Design And Verification Engineer

Role & responsibilities :

• Good understanding of verification concepts and techniques. Very good knowledge of Verilog/System Verilog and UVM.
• Experience and knowledge in Verification of IPs related to different applications. Good Knowledge in Power aware verification and Gate level verification is preferable. Should be able to understand the Full-chip Verification requirements as well and good knowledge in industry standard protocols.
• Verification for complex IPs and close the Verification to the challenging milestones.
• Strong knowledge of AXI4/AXI5 protocol
• Strong understanding of Coherency rules in ACE and ACE5
• Experience with architecting BFMs/VIPs
• Should be able to handle a team of 3-4 engineers (for senior position).
• IP Verification: VR creation as per the chip requirements and UVM/OVM Test benches creation
• Support in building verification infrastructure at the chip level as per the requirements
• Capable of handling multiple areas of IP Verification: RTL, Power Aware and Gate Level Verification
• Strong in SV and UVM. PCIe Gen5 Tetsbench development experience is required. CXL2.0/3.0 protocol working experience will be added advantage

Skills and Qualifications:

• Education: B.Tech/B.E. or M.Tech/M.S. in Electronics, Electrical Engineering, or a related field.
• Experience: 7-14 years of hands-on experience in ASIC design verification.
• Tools & Technologies:
• Proficiency in hardware description languages (Verilog, VHDL, SystemVerilog).
• Familiarity with UVM (Universal Verification Methodology) and other verification methodologies.
• Experience with simulation and debugging tools (ModelSim, VCS, Questa).
• Knowledge of scripting languages (Python, Tcl, Perl) for test automation.
• Experience with version control tools such as Git or SVN.

Desired Skills:

• Strong understanding of digital logic design, state machines, and timing analysis.
• Ability to work independently and collaboratively within a team environment.
• Strong problem-solving and analytical skills.
• Good communication skills to effectively report verification results and progress.

Preferred candidate profile

• Experience with high-level synthesis tools.
• Knowledge of low-power design techniques.
• Familiarity with performance verification and hardware-software co-verification.

Perks and benefits

According to company norms