We are seeking an exceptional Senior ASIC Verification Engineer to join our innovative semiconductor team. You will lead verification initiatives for complex ASIC designs and drive technical excellence across projects.
About the Role: You will be responsible for developing advanced verification environments, leading cross-functional technical initiatives, and mentoring team members while ensuring the highest quality standards in our ASIC designs.
What You'll Do: Design and implement advanced SystemVerilog/UVM verification infrastructures Lead verification planning and execution for complex ASIC projects Develop comprehensive test strategies ensuring thorough design validation Drive debug resolution through collaboration with cross-functional teams Mentor and provide technical guidance to verification team members Enhance and optimize verification methodologies Own end-to-end SOC verification environments
Required Skills & Experience: BS/MS in Electrical/Computer Engineering 2+ years of hands-on ASIC verification experience Expert-level SystemVerilog, UVM, and object-oriented programming skills Strong proficiency with industry tools like VCS, Xcelium, QuestaSim