MosChip Technologies - Design Verification Engineer - System Verilog (4-9 yrs)

Required skills :

Experience : 4 to 9

Job Location for 4 to 9 Years experience.

Hyderabad and Bangalore.

Required Skills :

- Hands-on experience of complete verification cycle with strong verification concepts.

- Strong knowledge of Verilog, SystemVerilog and UVM.

- Experience in UVM based Verification IP development.

- Experience in AMBA AXI/AHB/APB System buses (Good to have).

- Hands on work experience on any of PCIe/Eth/USB/DDR etc.

(Good to have) :

- Hands on experience with System Verilog Assertions.

- Scripting for automation, release process, simulations, regressions.

- Good command over written and oral communication.