Qualcomm Design & Verification Engineer Interview Questions and Answers

Medium level

RTL design, test bench , Simulation.

Q1. VLSI ic design, CMOS, digital electronics concepts.
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Q1. Toggle the bits of given input
Ans. 
Toggle the bits of given input
• Create a mask with all bits set to 1

• XOR the input with the mask to toggle the bits

• Repeat the process for each bit position
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Q2. Clear the set bit
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Q1. Print the star pattern
Ans. 
Print a star pattern using loops
• Use nested loops to print the desired pattern

• Increment the number of stars in each row to create the pattern

• Example: for a pattern with 5 rows - * , ** , *** , **** , *****
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Q2. Microprocessor microcontroller topics are asked
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Q1. How to predict if a 32 bit number is divisible by 8, draw a circuit using gates
Ans. 
To predict if a 32 bit number is divisible by 8, design a circuit using gates.
• Use a circuit with AND, OR, and NOT gates to check if the last three bits of the number are all zeros.

• If the last three bits are zeros, then the number is divisible by 8.

• For example, if the 32 bit number is 11010000, the last three bits are zeros, so it is divisible by 8.
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Q2. Various verilog scripting questions
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Q1. Basic question of sv like swapping no.
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Q2. Question from projects
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Q1. Basics of analog , digital and vlsi
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Q2. On face to face interview, they asked me abt my projects , digital, little analog , vlsi ( verilog), microcontrollers and c programming
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Had basic aptitude questions, verilog , c programming, digital electronics, analog electronics,computer architecture.

Q1. Basic questions related to electronics
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Q2. Question related to aptitude
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