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Mirafra Technologies Design & Verification Engineer Interview Questions and Answers

Updated 28 Jul 2024

Mirafra Technologies Design & Verification Engineer Interview Experiences

3 interviews found

Interview experience
3
Average
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(5 Questions)

  • Q1. Write code randc behaviour
  • Ans. 

    randc behavior generates random complex numbers with specified distribution

    • Use randc to generate random complex numbers

    • Specify distribution using arguments like mean, variance, etc.

    • Example: randc(10, 1, 2) generates 10 random complex numbers with mean 1 and variance 2

  • Answered by AI
  • Q2. Functinal coverage
  • Q3. Code coverage related questions
  • Q4. Monitor and scoreboard connections
  • Q5. Project related questions

Skills evaluated in this interview

Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - One-on-one 

(2 Questions)

  • Q1. Project questions
  • Q2. Sv and uvm basics
Round 2 - One-on-one 

(2 Questions)

  • Q1. Pcie basic questions
  • Q2. SV and UVM basics

Design & Verification Engineer Interview Questions Asked at Other Companies

asked in Frenus Tech
Q1. 1. XOR gate 2. How you compare two 4 bit numbers only using gates ... read more
Q2. Why $cast is used? Types of arrays
Q3. Explain setup time and hold time and what is the importance of se ... read more
Q4. What is mux? What are the use of select lines in mux?
asked in Samsung
Q5. how to call an interface signal at sequence level in uvm?

I applied via LinkedIn and was interviewed in May 2022. There were 4 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Aptitude Test 

This round consists of technical test which was focusing on electronics subjects.

Round 3 - Technical 

(1 Question)

  • Q1. In this round , questions were asked in digital design , verilog and projects.
Round 4 - HR 

(1 Question)

  • Q1. In this round as usual HR questions were asked.

Interview Preparation Tips

Interview preparation tips for other job seekers - Waste company Mirafra Technologies, they said that we will send offer letters to you within 2 or 3 days then they will not send offer letters and let you keep waiting for months.
In HR interview threy will say you " Best of Luck for future endeavors with Mirafra " but they will not send you offer letters. Hahahahahahha
It is not good for freshers, they are playing with freshers

Design & Verification Engineer Jobs at Mirafra Technologies

View all

Interview questions from similar companies

I applied via LinkedIn and was interviewed before Jun 2021. There were 4 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Aptitude Test 

Medium level

Round 3 - Coding Test 

RTL design, test bench , Simulation.

Round 4 - Technical 

(1 Question)

  • Q1. VLSI ic design, CMOS, digital electronics concepts.

Interview Preparation Tips

Interview preparation tips for other job seekers - Particularly for interns, you need to through with concepts related to your experience like hdl languages verilog, sv, scripting language is an added advantage, verification methodology, any projects, AMBA Protocol,Axi....any thing you mentioned in your resume must be Crystal clear..

I applied via Company Website and was interviewed in Mar 2022. There were 3 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Aptitude Test 

Had basic aptitude questions, verilog , c programming, digital electronics, analog electronics,computer architecture.

Round 3 - Technical 

(2 Questions)

  • Q1. Basic questions related to electronics
  • Q2. Question related to aptitude

Interview Preparation Tips

Interview preparation tips for other job seekers - As a fresher concentrate more on basics related to digital electronics,analog electronics, vlsi fundamentals, verilog
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Sep 2024. There were 2 interview rounds.

Round 1 - Aptitude Test 

Basic aptitude-10 question,digital moderate -Question,analog moderate -10 question,verilog and system verilog -10 question

Round 2 - One-on-one 

(3 Questions)

  • Q1. Latches and flip flop all characteristics equation and proof of the characteristics equation in flip flop.applications of flip flop
  • Q2. OOPS,INHERITANCE,VERILOG,BLOCKING - NON BLOCKING ASSIGNMENT OPERATOR and all the basic operations of verilog .
  • Q3. Discussion on work experience.

Interview Preparation Tips

Interview preparation tips for other job seekers - Be bonafide with your fundamentals core of digital circuits and design .
Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Campus Placement and was interviewed before Oct 2022. There were 2 interview rounds.

Round 1 - Aptitude Test 

A combination of Technical and Numerical aptitude. Questions on digital design, edc, vlsi.

Round 2 - One-on-one 

(3 Questions)

  • Q1. Questions on Digital Design
  • Q2. Questions on OOPS
  • Q3. Basic programming
Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
No response

I appeared for an interview in Dec 2024.

Round 1 - Technical 

(2 Questions)

  • Q1. Sv hvm questions on constraiants and assertions
  • Q2. Questions on resume projects
Round 2 - Technical 

(2 Questions)

  • Q1. Questions on protocols
  • Q2. Sv uvm questions
Round 3 - HR 

(2 Questions)

  • Q1. Salary and pckge discussion
  • Q2. Details on client interview
Round 4 - Client Interview 

(2 Questions)

  • Q1. Projects and challenges
  • Q2. Sv uvm basics
Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Aptitude Test 

Aptitude+digital electronics+vhdl

Interview Preparation Tips

Interview preparation tips for other job seekers - Tough level questions
Interview experience
3
Average
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Naukri.com and was interviewed in Jul 2023. There were 2 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(5 Questions)

  • Q1. SV, UVM, and interview questions related to AMBA protocol.
  • Q2. Logical questions based on constraint
  • Q3. Question based on SV oops
  • Q4. Question based on UVM tb
  • Q5. Question bases on assertions and coverage

Interview Preparation Tips

Interview preparation tips for other job seekers - SV, UVM, and some basic protocol.

Mirafra Technologies Interview FAQs

How many rounds are there in Mirafra Technologies Design & Verification Engineer interview?
Mirafra Technologies interview process usually has 2-3 rounds. The most common rounds in the Mirafra Technologies interview process are Technical, One-on-one Round and Resume Shortlist.
How to prepare for Mirafra Technologies Design & Verification Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Mirafra Technologies. The most common topics and skills that interviewers at Mirafra Technologies expect are UVM, Design Verification, System Verilog, SOC Verification and ASIC Verification.
What are the top questions asked in Mirafra Technologies Design & Verification Engineer interview?

Some of the top questions asked at the Mirafra Technologies Design & Verification Engineer interview -

  1. write code randc behavi...read more
  2. In this round , questions were asked in digital design , verilog and projec...read more
  3. Monitor and scoreboard connecti...read more

Tell us how to improve this page.

Mirafra Technologies Design & Verification Engineer Interview Process

based on 2 interviews

Interview experience

4
  
Good
View more
Mirafra Technologies Design & Verification Engineer Salary
based on 26 salaries
₹6 L/yr - ₹17.2 L/yr
27% more than the average Design & Verification Engineer Salary in India
View more details
Design Verification Engineers

Noida

3-5 Yrs

Not Disclosed

Design Verification Engineer

Noida,

Hyderabad / Secunderabad

+1

3-8 Yrs

Not Disclosed

Design Verification Engineers

Noida

3-7 Yrs

Not Disclosed

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