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Mirafra Technologies

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based on 233 Reviews

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Mirafra Technologies Design & Verification Engineer Interview Questions and Answers

Updated 28 Jul 2024

Mirafra Technologies Design & Verification Engineer Interview Experiences

3 interviews found

Design & Verification Engineer Interview Questions & Answers

user image Anonymous

posted on 24 Jul 2024

Interview experience
3
Average
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Technical 

(5 Questions)

  • Q1. Write code randc behaviour
  • Ans. 

    randc behavior generates random complex numbers with specified distribution

    • Use randc to generate random complex numbers

    • Specify distribution using arguments like mean, variance, etc.

    • Example: randc(10, 1, 2) generates 10 random complex numbers with mean 1 and variance 2

    • Answered by AI
    Add your answer
  • Q2. Functinal coverage
    • Add your answer
  • Q3. Code coverage related questions
    • Add your answer
  • Q4. Monitor and scoreboard connections
    • Add your answer
  • Q5. Project related questions
    • Add your answer

Skills evaluated in this interview

Design & Verification Engineer Interview Questions & Answers

user image Anonymous

posted on 28 Jul 2024

Interview experience
5
Excellent
Difficulty level
-
Process Duration
-
Result
-
Round 1 - One-on-one 

(2 Questions)

  • Q1. Project questions
    • Add your answer
  • Q2. Sv and uvm basics
    • Add your answer
Round 2 - One-on-one 

(2 Questions)

  • Q1. Pcie basic questions
    • Add your answer
  • Q2. SV and UVM basics
    • Add your answer

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Design & Verification Engineer Interview Questions & Answers

user image Anonymous

posted on 19 Nov 2022

I applied via LinkedIn and was interviewed in May 2022. There were 4 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Aptitude Test 

This round consists of technical test which was focusing on electronics subjects.

Round 3 - Technical 

(1 Question)

  • Q1. In this round , questions were asked in digital design , verilog and projects.
    • Add your answer
Round 4 - HR 

(1 Question)

  • Q1. In this round as usual HR questions were asked.
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - Waste company Mirafra Technologies, they said that we will send offer letters to you within 2 or 3 days then they will not send offer letters and let you keep waiting for months.
In HR interview threy will say you " Best of Luck for future endeavors with Mirafra " but they will not send you offer letters. Hahahahahahha
It is not good for freshers, they are playing with freshers

Design & Verification Engineer Jobs at Mirafra Technologies

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Top trending discussions

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Salary Discussions, Hike & Promotions
2w
a procurement specialist
RSU's can be added to CTC?
My fixed CTC is 11,17,231, and I have 205 RSUs vesting over four years. My estimated RSU value for the first year is approximately 2,63,007 rupees, based on a current stock price of $60.15 USD per share (converted to rupees). Therefore, would it be appropriate to inform my potential employer that my total compensation is 13,80,238 rupees?
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Interview questions from similar companies

Design & Verification Engineer Interview Questions & Answers

Texas Instruments user image Anonymous

posted on 20 Jun 2022

I applied via LinkedIn and was interviewed before Jun 2021. There were 4 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Aptitude Test 

Medium level

Round 3 - Coding Test 

RTL design, test bench , Simulation.

Round 4 - Technical 

(1 Question)

  • Q1. VLSI ic design, CMOS, digital electronics concepts.
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - Particularly for interns, you need to through with concepts related to your experience like hdl languages verilog, sv, scripting language is an added advantage, verification methodology, any projects, AMBA Protocol,Axi....any thing you mentioned in your resume must be Crystal clear..

Design & Verification Engineer Interview Questions & Answers

Synopsys user image Anonymous

posted on 2 Oct 2024

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Campus Placement and was interviewed in Sep 2024. There were 2 interview rounds.

Round 1 - Aptitude Test 

Basic aptitude-10 question,digital moderate -Question,analog moderate -10 question,verilog and system verilog -10 question

Round 2 - One-on-one 

(3 Questions)

  • Q1. Latches and flip flop all characteristics equation and proof of the characteristics equation in flip flop.applications of flip flop
    • Add your answer
  • Q2. OOPS,INHERITANCE,VERILOG,BLOCKING - NON BLOCKING ASSIGNMENT OPERATOR and all the basic operations of verilog .
    • Add your answer
  • Q3. Discussion on work experience.
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - Be bonafide with your fundamentals core of digital circuits and design .

Design & Verification Engineer Interview Questions & Answers

Synopsys user image Anonymous

posted on 27 Sep 2022

I applied via Company Website and was interviewed in Mar 2022. There were 3 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Aptitude Test 

Had basic aptitude questions, verilog , c programming, digital electronics, analog electronics,computer architecture.

Round 3 - Technical 

(2 Questions)

  • Q1. Basic questions related to electronics
    • Add your answer
  • Q2. Question related to aptitude
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - As a fresher concentrate more on basics related to digital electronics,analog electronics, vlsi fundamentals, verilog

Design & Verification Engineer Interview Questions & Answers

Tessolve Semiconductor user image Anonymous

posted on 16 Aug 2023

Interview experience
3
Average
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
Selected Selected

I applied via Naukri.com and was interviewed in Jul 2023. There were 2 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(5 Questions)

  • Q1. SV, UVM, and interview questions related to AMBA protocol.
    • Add your answer
  • Q2. Logical questions based on constraint
    • Add your answer
  • Q3. Question based on SV oops
    • Add your answer
  • Q4. Question based on UVM tb
    • Add your answer
  • Q5. Question bases on assertions and coverage
    • Add your answer

Interview Preparation Tips

Interview preparation tips for other job seekers - SV, UVM, and some basic protocol.

Design & Verification Engineer Interview Questions & Answers

Tessolve Semiconductor user image Anonymous

posted on 11 Oct 2023

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Campus Placement and was interviewed before Oct 2022. There were 2 interview rounds.

Round 1 - Aptitude Test 

A combination of Technical and Numerical aptitude. Questions on digital design, edc, vlsi.

Round 2 - One-on-one 

(3 Questions)

  • Q1. Questions on Digital Design
    • Add your answer
  • Q2. Questions on OOPS
    • Add your answer
  • Q3. Basic programming
    • Add your answer

Design & Verification Engineer Interview Questions & Answers

Tessolve Semiconductor user image mariyappan r

posted on 2 Dec 2024

Interview experience
4
Good
Difficulty level
-
Process Duration
-
Result
-
Round 1 - Aptitude Test 

Aptitude+digital electronics+vhdl

Interview Preparation Tips

Interview preparation tips for other job seekers - Tough level questions

Design & Verification Engineer Interview Questions & Answers

Tessolve Semiconductor user image Anonymous

posted on 31 Dec 2024

Interview experience
5
Excellent
Difficulty level
Moderate
Process Duration
2-4 weeks
Result
No response

I appeared for an interview in Dec 2024.

Round 1 - Technical 

(2 Questions)

  • Q1. Sv hvm questions on constraiants and assertions
    • Add your answer
  • Q2. Questions on resume projects
    • Add your answer
Round 2 - Technical 

(2 Questions)

  • Q1. Questions on protocols
    • Add your answer
  • Q2. Sv uvm questions
    • Add your answer
Round 3 - HR 

(2 Questions)

  • Q1. Salary and pckge discussion
    • Add your answer
  • Q2. Details on client interview
    • Add your answer
Round 4 - Client Interview 

(2 Questions)

  • Q1. Projects and challenges
    • Add your answer
  • Q2. Sv uvm basics
    • Add your answer
More about working at Mirafra Technologies

Mirafra Technologies Interview FAQs

How many rounds are there in Mirafra Technologies Design & Verification Engineer interview?
Mirafra Technologies interview process usually has 2-3 rounds. The most common rounds in the Mirafra Technologies interview process are Technical, One-on-one Round and Resume Shortlist.
How to prepare for Mirafra Technologies Design & Verification Engineer interview?
Go through your CV in detail and study all the technologies mentioned in your CV. Prepare at least two technologies or languages in depth if you are appearing for a technical interview at Mirafra Technologies. The most common topics and skills that interviewers at Mirafra Technologies expect are UVM, Design Verification, System Verilog, SOC Verification and ASIC Verification.
What are the top questions asked in Mirafra Technologies Design & Verification Engineer interview?

Some of the top questions asked at the Mirafra Technologies Design & Verification Engineer interview -

  1. write code randc behavi...read more
  2. In this round , questions were asked in digital design , verilog and projec...read more
  3. Monitor and scoreboard connecti...read more

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Mirafra Technologies Design & Verification Engineer Interview Process

based on 2 interviews

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Mirafra Technologies Design & Verification Engineer Salary
based on 26 salaries
₹5.4 L/yr - ₹18 L/yr
43% more than the average Design & Verification Engineer Salary in India
View more details
Design & Verification Engineer Jobs at Mirafra Technologies
Design Verification Engineers

Noida

3-5 Yrs

Not Disclosed

Design Verification Engineer

Noida,

Hyderabad / Secunderabad

+1

3-8 Yrs

Not Disclosed

Design Verification Engineers

Noida

3-7 Yrs

Not Disclosed

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