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Basing C++ test on PC screen
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posted on 22 Aug 2024
I applied via LinkedIn and was interviewed in Jul 2024. There was 1 interview round.
posted on 31 Dec 2023
I applied via Campus Placement and was interviewed in Dec 2023. There were 2 interview rounds.
Apptitide, Digital Electronics, physical Design concepts.
posted on 22 Aug 2024
I applied via LinkedIn and was interviewed in Jul 2024. There was 1 interview round.
posted on 31 Dec 2023
I applied via Campus Placement and was interviewed in Dec 2023. There were 2 interview rounds.
Apptitide, Digital Electronics, physical Design concepts.
posted on 29 Jun 2023
I applied via Recruitment Consulltant and was interviewed in May 2023. There were 3 interview rounds.
Very basic questions on digital and verilog and sv
Latches are level-sensitive while flip-flops are edge-triggered. Flip-flops have a clock input while latches do not.
Latches are level-sensitive, meaning the output changes as long as the enable signal is active.
Flip-flops are edge-triggered, meaning the output changes only on the rising or falling edge of the clock signal.
Flip-flops have a clock input which latches do not have.
Latches are faster but consume more power ...
Digital electronics is a branch of electronics that deals with digital signals and systems.
Deals with discrete values (0s and 1s)
Utilizes logic gates to process digital signals
Used in computers, smartphones, digital cameras, etc.
Digital circuits can be easily replicated and manipulated
I applied via Campus Placement and was interviewed in Nov 2022. There were 4 interview rounds.
Assignment related to battery design for a given conditions
What government policies can be implemented for circular economy?
posted on 13 Jun 2023
I applied via Campus Placement and was interviewed in Dec 2022. There were 4 interview rounds.
Digital Verilog and Sv and aptitude
Digital electronics is a branch of electronics that deals with digital signals and systems.
Deals with discrete values (0s and 1s)
Utilizes logic gates to perform operations
Commonly used in computers, calculators, and digital clocks
Latches are level-sensitive while flip-flops are edge-triggered. Flip-flops have a clock input while latches do not.
Latches are level-sensitive, meaning the output changes as long as the enable signal is active. Flip-flops are edge-triggered, changing only on the rising or falling edge of the clock signal.
Flip-flops have a clock input which controls when the output changes, while latches do not have a clock input.
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