Decor India Site Engineer Interview Questions and Answers

UVM is a methodology for verifying complex designs using SystemVerilog. Blocking assignments execute sequentially, while non-blocking assignments execute concurrently.

• UVM (Universal Verification Methodology) is a standardized methodology for verifying complex designs in SystemVerilog.

• Blocking assignments in SystemVerilog execute sequentially, meaning the next statement waits for the current statement to finish.

• Non-bloc...read more

Symbols in drawing represent specific elements, materials, or instructions, aiding in clear communication of design intent.

• Symbols simplify complex information, e.g., electrical symbols like resistors and capacitors.

• They ensure consistency across drawings, such as using the same symbol for a door in architectural plans.

• Symbols can indicate material types, like hatching patterns for different materials in engineering dr...read more

A skill matrix is a tool used to assess and visualize the skills of team members against project requirements.

• Helps identify skill gaps within a team.

• Facilitates targeted training and development plans.

• Enables better resource allocation for projects.

• Example: A software team may list skills like Java, Python, and SQL, rating each member's proficiency.

A go gauge is a precision tool used to check the dimensional accuracy of parts, ensuring they meet specified tolerances.

• Used in manufacturing to verify that a part fits within specified limits.

• Typically consists of a 'go' side that should fit and a 'no-go' side that should not fit.

• Example: A go gauge for a hole might be a pin that fits perfectly, while a no-go gauge would be a larger pin that does not fit.

• Helps in main...read more