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ILJIN ELECTRONICS Quality Analyst Interview Questions and Answers

Updated 1 Jan 2021

ILJIN ELECTRONICS Quality Analyst Interview Experiences

1 interview found

I applied via Walk-in and was interviewed in Jul 2020. There was 1 interview round.

Interview Questionnaire 

1 Question

  • Q1. Tell me about your self?

Interview Preparation Tips

Interview preparation tips for other job seekers - Baiscally the interview was not technically they asked some technicall question releated to branch.

Interview questions from similar companies

Interview Questionnaire 

1 Question

  • Q1. State machines

I applied via Referral and was interviewed before Sep 2020. There was 1 interview round.

Interview Questionnaire 

2 Questions

  • Q1. Basic c programming
  • Q2. Previous experience questions

Interview Preparation Tips

Interview preparation tips for other job seekers - Be honest. And prepare well in data structures

I applied via Campus Placement and was interviewed in Dec 2016. There were 5 interview rounds.

Interview Questionnaire 

2 Questions

  • Q1. Communication Concepts
  • Q2. Embedded Concepts

Interview Preparation Tips

Round: Resume Shortlist
Experience: Shortlisted based on CGPA and Profile
Tips: CGPA above 7.5 and Communication/CS based coursework/ability

Round: Test
Experience: C Coding Questions which checked basic knowledge of C
Tips: Brush up your C skills. Questions are easy but may require knowledge of stuff like what is big endian and little endian etc.
Duration: 1 hour 30 minutes
Total Questions: 12

Round: Technical Interview
Experience: My Communication relation concepts were tested. My Major Project was asked in detail.
Tips: If Comm background, prepare ITC, MultiCarrier/Wireless at a good level. If not they will ask C.

Round: Technical Interview
Experience: I was asked basic level embedded concepts.
Tips: Prepare on the following and similar stuff : How to implement a pseudo dynamic memory allocation using flash memory- which data structure to use. How does Inter Process Communication work. How does a multicore processor synchronizes its cores. If Comm background, give the TX and RX chain design (Wireless System Design)

Skills: Communication Systems, Embedded Systems, C Programming
College Name: IIT Madras

Software Engineer Interview Questions & Answers

MaxLinear user image Gayathri S ee15m052

posted on 4 Dec 2016

I applied via Campus Placement and was interviewed before Dec 2015. There were 2 interview rounds.

Interview Preparation Tips

Round: Test
Experience: It was a written test with some numerical aptitude questions and coding questions. The test was fairly easy
Duration: 1 hour

College Name: IIT Madras

I applied via Campus Placement and was interviewed in Dec 2016. There were 3 interview rounds.

Interview Preparation Tips

Round: Test
Experience: It was a written test with some numerical aptitude questions and coding questions. The test was fairly easy
Tips: Learn about pointers and using function pointers

Round: Technical Interview
Experience: First, I was asked to brief about the projects I have done so far. Then there were some questions about C programming like pointers, const pointers, storage classes, volatile keyword etc. It was followed by some basic questions about computer architecture, microcontroller, FPGA, RTOS

Round: Technical Interview
Experience: In this round I was asked to write algorithm for some simple problems like checking if a given integer (not string) is palindrome or not, checking if a number is a multiple of 3 (using bitwise operations) etc

College Name: IIT Madras
Interview experience
3
Average
Difficulty level
Easy
Process Duration
Less than 2 weeks
Result
Not Selected
Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Don’t add your photo or details such as gender, age, and address in your resume. These details do not add any value.
View all tips
Round 2 - One-on-one 

(1 Question)

  • Q1. Digital circuit Designing for adders, mux, couter, FSM. In Verilog Blocking and non-blocking assignments, RAM RTL code, Datatypes etc
  • Ans. 

    Digital circuit design in Verilog including adders, mux, counter, FSM, RAM RTL code, datatypes, and blocking/non-blocking assignments.

    • Verilog is a hardware description language used for digital circuit design.

    • Adders are used for arithmetic operations, mux for data selection, counter for counting, and FSM for control logic.

    • Blocking assignments are executed sequentially, while non-blocking assignments are executed concur...

  • Answered by AI
Round 3 - HR 

(1 Question)

  • Q1. Introduction, Want to join or not

Interview Preparation Tips

Interview preparation tips for other job seekers - Be formal with the explanation.

Skills evaluated in this interview

Interview experience
5
Excellent
Difficulty level
Hard
Process Duration
4-6 weeks
Result
Selected Selected

I applied via Company Website and was interviewed before Apr 2022. There were 5 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Double-check your resume for any spelling mistakes. The recruiter may consider spelling mistakes as careless behavior or poor communication skills.
View all tips
Round 2 - Coding Test 

Pointer and linked list

Round 3 - Case Study 

Pure technical on kernel programming

Round 4 - Technical 

(3 Questions)

  • Q1. Pure technical questions on background project
  • Q2. Mutex semaphore and spinlock
  • Q3. How you will achieve multi threaded programming
  • Ans. 

    Multi-threaded programming can be achieved by creating multiple threads that run concurrently.

    • Identify the tasks that can be executed in parallel

    • Create threads using threading libraries in the chosen programming language

    • Synchronize the threads to avoid race conditions and deadlocks

    • Use locks, semaphores, and mutexes to manage shared resources

    • Optimize the performance by balancing the workload among threads

  • Answered by AI
Round 5 - HR 

(1 Question)

  • Q1. Why you want to join this company
Interview experience
4
Good
Difficulty level
Easy
Process Duration
Less than 2 weeks
Result
Selected Selected

I applied via Referral and was interviewed before Oct 2022. There were 3 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Do not use an unprofessional email address such as cool_boy@email.com. It shows a lack of professionalism by the candidate.
View all tips
Round 2 - One-on-one 

(1 Question)

  • Q1. This was more like shortlisting round with manager. Asked about resume and previous work experience. Not much Technical questions.
Round 3 - One-on-one 

(5 Questions)

  • Q1. Python programming questions, Basics
  • Q2. Python oops concepts
  • Q3. What is module in Python
  • Ans. 

    A module in Python is a file containing Python code, which can define functions, classes, and variables.

    • Modules help organize Python code into reusable components

    • Modules can be imported into other Python scripts using the 'import' keyword

    • Examples of modules in Python include math, random, and os

  • Answered by AI
  • Q4. Python memory management
  • Q5. Basic Devops questions

Skills evaluated in this interview

Intern Interview Questions & Answers

Maven Silicon user image s160878 P.Rudra Venkata

posted on 21 Jul 2023

Interview experience
4
Good
Difficulty level
Moderate
Process Duration
Less than 2 weeks
Result
Not Selected

I applied via Walk-in and was interviewed in Jun 2023. There were 3 interview rounds.

Round 1 - Resume Shortlist 
Pro Tip by AmbitionBox:
Keep your resume crisp and to the point. A recruiter looks at your resume for an average of 6 seconds, make sure to leave the best impression.
View all tips
Round 2 - Technical 

(2 Questions)

  • Q1. Basic digital electronics
  • Q2. Latch and flipflop differences
  • Ans. 

    Latch is level triggered, while flip-flop is edge triggered. Latch is asynchronous, while flip-flop is synchronous.

    • Latch stores data as long as the enable signal is high, while flip-flop stores data only on the rising or falling edge of the clock signal.

    • Latch is level triggered, meaning it changes output whenever the input changes, while flip-flop is edge triggered, changing output only on clock signal edges.

    • Latch is a...

  • Answered by AI
Round 3 - Technical 

(1 Question)

  • Q1. Digital electronics combinational amd sequential circuits

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