i
Ansys Software Private Limited
Filter interviews by
Digital, RC RL circuits, Python, STA
I applied via Referral and was interviewed in Sep 2024. There were 3 interview rounds.
Three DSA questions one on likedlist one on BST and one on maps
Smart pointers in C++ provide automatic memory management and help prevent memory leaks.
Smart pointers are objects that manage the memory of a pointer automatically.
They ensure that memory is deallocated when it is no longer needed.
Examples include unique_ptr, shared_ptr, and weak_ptr.
DSA questions on graph and lots of puzzles
I applied via campus placement at B M S College of Engineering, Bangalore and was interviewed in Jul 2024. There were 2 interview rounds.
Asked Basic Aptitude Questions
ASICs are custom-designed for specific applications, while FPGAs are reprogrammable and more flexible.
ASICs are Application-Specific Integrated Circuits designed for a specific purpose or application.
FPGAs are Field-Programmable Gate Arrays that can be reconfigured for different tasks.
ASICs are more efficient and faster than FPGAs for specific tasks.
FPGAs are more flexible and can be reprogrammed for different function...
I applied via campus placement at College of Engineering ( Formerly Pune Instiute of Enginering and Technology ), Pune and was interviewed in Jul 2024. There were 3 interview rounds.
The regions of operation of MOSFETs in a CMOS inverter are cutoff, triode, and saturation.
MOSFET operates in cutoff region when Vgs < Vth
MOSFET operates in triode region when Vgs > Vth and Vds < Vgs - Vth
MOSFET operates in saturation region when Vgs > Vth and Vds > Vgs - Vth
CMOS inverter uses both NMOS and PMOS transistors to achieve high noise immunity and low power consumption
Power leakage is the power dissipated in CMOS circuits when transistors are in off state, while dynamic power is the power dissipated during switching.
Power leakage occurs due to subthreshold leakage currents in transistors when they are in off state
Dynamic power is the power dissipated during charging and discharging of capacitive loads in CMOS circuits
Power leakage increases with decreasing transistor size, while dyn...
I come from a close-knit family with a diverse background, including engineers, teachers, and entrepreneurs.
My father is an electrical engineer and my mother is a high school teacher.
I have a younger sister who is studying business in college.
My grandparents were entrepreneurs and owned a small business in our hometown.
Family gatherings are always filled with lively discussions about technology, education, and business
Ansys Software Private Limited interview questions for popular designations
Get interview-ready with Top Ansys Software Private Limited Interview Questions
The project is a software application designed to provide technical support to customers experiencing issues with a product or service.
Developed a user-friendly interface for customers to submit support tickets
Implemented a ticketing system to track and prioritize customer issues
Integrated knowledge base articles to provide self-help resources for common problems
The project is a software application designed to streamline technical support processes and improve customer satisfaction.
Developed a user-friendly interface for customers to submit support tickets
Implemented a ticketing system to track and prioritize support requests
Integrated knowledge base for quick access to troubleshooting guides
Utilized automation tools to expedite resolution times
Conducted regular analysis of s
I applied via Naukri.com and was interviewed in Jun 2024. There was 1 interview round.
I applied via Campus Placement and was interviewed in Feb 2024. There were 2 interview rounds.
Digital electronics, circuits , verilog , asic design flow
ASIC design flow process involves steps like specification, design, verification, synthesis, and testing.
Specification: Define requirements and constraints for the ASIC design.
Design: Create a high-level design based on the specifications.
Verification: Verify the design using simulations and tests.
Synthesis: Convert the design into a netlist of gates and connections.
Testing: Test the fabricated ASIC to ensure functiona...
Power reduction techniques in CMOS involve various methods to minimize power consumption in CMOS circuits.
Use of power gating to selectively turn off power to unused circuit blocks
Implementing clock gating to disable clock signals to unused circuitry
Utilizing voltage scaling to reduce power consumption at lower voltages
Applying dynamic voltage and frequency scaling to adjust voltage and frequency based on workload
Using...
It written test. Do all the logical questions. Along with that prepared for machine drawing
Biot number represents the ratio of internal resistance to external resistance in heat transfer, while Nusselt number represents the ratio of convective to conductive heat transfer.
Biot number is used to determine the relative importance of internal resistance to heat transfer compared to external resistance.
Nusselt number is used to determine the relative importance of convective heat transfer compared to conductive h...
Top trending discussions
Some of the top questions asked at the Ansys Software Private Limited interview -
The duration of Ansys Software Private Limited interview process can vary, but typically it takes about less than 2 weeks to complete.
based on 18 interviews
Interview experience
based on 114 reviews
Rating in categories
Bangalore / Bengaluru
5-10 Yrs
Not Disclosed
5-7 Yrs
Not Disclosed
R&D Engineer
49
salaries
| ₹14 L/yr - ₹26.5 L/yr |
Senior R&D Engineer
34
salaries
| ₹22 L/yr - ₹43 L/yr |
Applications Engineer
33
salaries
| ₹13.9 L/yr - ₹30.5 L/yr |
Technical Support Engineer
23
salaries
| ₹10 L/yr - ₹19 L/yr |
Senior Application Engineer
21
salaries
| ₹15 L/yr - ₹30 L/yr |
Autodesk
Cadence Design Systems
Synopsys
Siemens