ASIC Digital Design, Sr Engineer

At Synopsys, were at the heart of the innovations that change the way we work and play.
Self-driving cars.
Artificial Intelligence.
The cloud.
5G.
The Internet of Things.
These breakthroughs are ushering in the Era of Smart Everything.
And were powering it all with the worlds most advanced technologies for chip design and software security.
If you share our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC?faster.
We offer the worlds broadest portfolio of silicon IP?predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors.
All to help customers integrate more capabilities.
Meet unique performance, power, and size requirements of their target applications.
And get differentiated products to market quickly with reduced risk.
Senior ASIC and Firmware Design Engineer.
Seeking a highly motivated and innovative digital design engineer with knowledge of ASIC and Firmware development flows.
The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation NRZ and PAM-based SerDes products.
Theoretical and practical background in high-speed serializer and data recovery circuits is a strong plus.
The position offers an excellent opportunity to work with an expert team of digital and mixed-signal engineers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on prototype test-chips.
Key Qualifications.
At Synopsys, were at the heart of the innovations that change the way we work and play.
Self-driving cars.
Artificial Intelligence.
The cloud.
5G.
The Internet of Things.
These breakthroughs are ushering in the Era of Smart Everything.
And were powering it all with the worlds most advanced technologies for chip design and software security.
If you are inline with our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC?faster.
We offer the worlds broadest portfolio of silicon IP?predesigned macros, memory, interfaces, analog, security, and embedded processors.
All to help customers integrate more capabilities.
Meet unique performance, power, and size requirements of their target applications.
And get differentiated products to market quickly with reduced risk.
ASIC and Firmware Design Engineer Seeking a highly motivated and innovative digital design engineer with knowledge of ASIC and Firmware development flows.
The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation NRZ and PAM-based SerDes products.
Theoretical and practical background in high-speed serializer and data recovery circuits is a definite plus.
The position offers an excellent opportunity to work with an able team of digital and mixed-signal engineers accountable for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on prototype test-chips.
The PHY IP development is very dynamic and provides an endless list of challenges.
The candidate would have an initial training done by the top experts in the field as well as continuous on the job training and assignments.
The work is very challenging, not only given the constant technological changes but also given the ownership and the need to charter unknown waters.
Key Qualifications.
BSEE or MSEE plus a minimum of 5 years industry experience of Silicon Bring up and Functional Validation.
Preferred Experience.
Experience with structured firmware development, verification and documentation process.
Experience with digital logic design, simulation and debug using Verilog and VCS.
Demonstrated experience executing projects from start to completion.
Good communication skills for interacting between different design groups and customer support teams are required.
Must be self-motivated, proactive, and able to balance good design quality while meeting tight deadlines.
Hands on experience of SerDes standards.
Ethernet and PCIE PHY.
Good organization and communication skills.
Inclusion and Diversity are important to us.
Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Synopsys Canada ULC values the diversity of our workforce.
We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to candidates throughout the recruitment and employment process.
Should you require an accommodation, please contact hr-help-india@synopsys com.
In a nutshell: Minimum 5 yrs exp.
Sound knowledge in SERDES.
Validation/verification/design experience and looking to play with Silicon.
Protocol understanding at PHY Layer (PCIE/ETH).
System level (retimer application/ switch application) (Good but not mandatory).
Experience in silicon validation and debugging.
Experience in end-to-end debug cycle execution from scratch.
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