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ASIC Digital Design, Sr Staff Engineer
8-13 years
Hyderabad / Secunderabad
1 vacancy
ASIC Digital Design, Sr Staff Engineer
Synopsys
posted 5mon ago
Job Role Insights
Flexible timing
Key skills for the job
Job Description
- The candidate will be a key member of the Synopsys ARC Processor hardware team working on next-generation ARC processor Verification.
- Individual contributor will be responsible for Verification of RTL design of microprocessor IP.
- Work with multi-site core teams.
- Review and improve verification test suites.
- At minimum, a bachelors/masters degree in engineering is required with 8+ years of digital design verification experience using UVM and System Verilog.
- Strong background in RISC architectures, AMBA (AHB, AXI) protocols are required.
- Working experience in RISC microprocessor IP design, an understanding of multi-core architectures and development techniques are a plus.
- Experience with multi-site development is helpful.
- Verification of embedded RISC microprocessor IP
- Write Verification plans based on High-level architecture and micro-architecture specifications of the design
- Develop standalone System Verilog testbenches to verify at Module Level (MLV)
- Working closely with the design/verification teams
- Hands on experience closing the Functional and code coverages
- Maintain our current processor product line and their derivative products
- Good written, oral and problem-solving skills desired along with good communication skills and inter-person skills
- Work with multi-site, multi-time zone, multi-cultural teams on various aspects of the product like design, implementation, physical design, verification
Employment Type: Full Time, Permanent
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Rating based on 5 Senior Staff Engineer
reviews
Anonymous · Research & Development
in Hyderabad / Secunderabad
Work life balance
- Salary - Good
Growth, reimbursement policies, not all managers are good
Senior Staff Engineer salary at Synopsys
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Synopsys Benefits
Health & Wellness Career Growth Community & Belonging 
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