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1 Apolis Senior Engineer Job

Senior Engineer - ASIC/RTL Design (10-20 yrs)

10-20 years

Senior Engineer - ASIC/RTL Design (10-20 yrs)

Apolis

posted 6d ago

Job Role Insights

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Job Description

Job Title : ASIC RTL - Senior Engineer

Job Type : Full Time

Location : Bangalore / Hyderabad / Pune / Noida

Work Mode : Work From Office

Experience : 10+ years

Job Description :

We are seeking a highly skilled and experienced ASIC RTL Engineer to join our team. The ideal candidate will have expertise in SoC subsystem/IP design and integration, as well as a strong understanding of RTL quality checks, synthesis, and various interface protocols.

JOB INFORMATION :

1. Design and develop IP, subsystems/clusters, and integrate at the SoC level using Verilog/SystemVerilog

2. Ensure RTL quality through comprehensive checks, including Lint and Clock Domain Crossing (CDC) analysis.

3. Collaborate with synthesis and low-power design teams to optimize power and performance.

4. Work with AMBA bus protocols, including AXI, AHB, ATB, and APB.

5. Implement and debug various interface protocols such as PCIe, DDR, Ethernet, I2C, UART, and SPI.

6. Utilize industry-standard tools for design and verification, including Spyglass Lint/CDC, Synopsys Design Compiler (DC), and Verdi/Xcellium.

7. Develop and maintain scripting flows using Make, Perl, Shell, and Python to automate tasks and improve efficiency.

8. Collaborate with cross-functional teams, including physical design, verification, DFT, and software teams, to resolve design-related issues.

9. Create and review design documents for multiple subsystems to ensure accuracy and completeness.

10. Provide guidance and debug support for complex subsystem designs.

11. Understanding of processor architecture and/or ARM debug architecture is a plus.

12. Bachelor's/Master's in Electrical Engineering, Computer Engineering, or a related field

13. Minimum 10+ years of ASIC RTL experience.

14. Proven expertise in ASIC RTL design and SoC integration.

15. Strong knowledge of RTL quality methodologies and tools.

16. Hands-on experience with industry-standard ASIC design and verification tools.

17. Familiarity with low-power design techniques and synthesis methodologies.

18. Strong problem-solving and debugging skills.

19. Excellent written and verbal communication skills.


Functional Areas: Other

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What Senior Engineer at Apolis are saying

Senior Engineer salary at Apolis

reported by 2 employees with 10-13 years exp.
₹11.2 L/yr - ₹14.4 L/yr
41% more than the average Senior Engineer Salary in India
View more details

What Apolis employees are saying about work life

based on 63 employees
52%
97%
72%
81%
Strict timing
Monday to Friday
No travel
Night Shift
View more insights

Apolis Benefits

Free Transport
Free Food
Work From Home
Cafeteria
Team Outings
Soft Skill Training +6 more
View more benefits

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