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Principal Engineer - SOC Verification
5-9 years
Pune, Bangalore / Bengaluru
1 vacancy
Principal Engineer - SOC Verification
Open-Silicon
posted 2mon ago
Job Role Insights
Key skills for the job
Job Description
- Will be responsible for verification of IP, Block, or Subsystem at Soc Level
- Generate appropriate documentation for verification
- Responsible for analyzing/debugging given blocks/tasks in verification
- Should be able to develop and own the verification environment, verification components developed
- You will report to Director - ASIC Design
What Youll Need:
- 15+ years of experience with a Bachelors/ Masters degree in the field of Electrical, Electronics, or computer engineering
- Should have a good understanding of verification flow, challenges, and requirements of functional verification
- Have worked on IP level or Block level or SoC level functional verification
- Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology philosophy
- Expert in System Verilog, Verilog, and OVM/UVM verification methodology
- Have working experience on AMBA interface protocols (AXI, AHB, APB)
- Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must
- Hands-on experience on working one or more of the following protocols is a must - UART, I2C, SPI, QSPI, I3C, eMMC, CAN,
- Hands-on experience working with one or more of the following protocols is desired - PCIe, USB, DDR, LPDDR, GBE, SATA
- Experience with Perl, Python or similar scripting languages will be helpful
- Ability to adapt learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals.
Employment Type: Full Time, Permanent
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