Niksperri Technologies - Design Verification Engineer - C/C++ (5-9 yrs)

Experience : 5+ years.

Location : Bangalore.

About us : NikSperri Technologies is one of the premier experts in providing semiconductor solution from RTL to GDSII.

NikSperri Offers Semiconductor Services in form of R & D and provides Staff Augmentation and ODC model to Chip Product Companies.

Already in delivering stages of IPs in Analog Layout Domain.

We are Moving towards IP developments in Verification Domain in cutting edge technologies.

The company specializes in executing complete RTL Design, Integration, Verification, STA-Synthesis, Physical design, and tapeout services.

Roles & Responsibilities :

- Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.

- Responsible to implement and analyze system Verilog assertion and coverage (code, toggle, functional).

- Work alongside other members of the verification team to analyze, develop and execute verification test cases and able to provide relevant solution to issue.

- Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks.

- Adhere to quality standards and good test and verification practices.

- Prior work experience on IP level or Soc level.

- Prior work experience on DV/GLS/PAGLS.

- Good understanding of processor-based Soc level verification which includes native, Verilog, system Verilog and UVM mix environment.

- Hand on experience with verification tools such as VCS, waveform analyzer and third-party VIP integration (such as Synopsys VIPs).

- Hands on experience in UVM , C/C++, System Verilog verification language.

- Good understanding of AXI-AMBA protocol variants.

- Can work with scripting language (shell, Makefile, Perl).

- Strong understanding of design concepts and ASIC flow.

- Good problem solving, analytical and debugging skill is must.